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參數(shù)資料
型號: TS86101G2BMGS
廠商: ATMEL CORP
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 10-BIT DAC, PBGA255
封裝: CI-CGA-255
文件頁數(shù): 55/57頁
文件大?。?/td> 1119K
代理商: TS86101G2BMGS
7
5343C–BDC–03/06
TS86101G2B
Notes:
1. SFDR is the ratio of the magnitude of the first (main) harmonic and the highest other harmonic measured over the frequency
band DC to Fs/2 (first Nyquist zone).
2. SFDR is the ratio of the magnitude of the first (main) harmonic and the highest other harmonic measured over the frequency
band Fs to 3 × Fs/2 (third Nyquist zone).
3. Initial gain error corresponds to the deviation of the DC gain center value from the unity gain.
4. DC gain dispersion excludes initial gain error.
5. Mid-scale output voltage is measured with a 100
differential load on DAC output.
6. Minimum operating clock frequency can be DC. Actually linked to clock input AC coupling external capacitor.
Switching Performance
Maximum operating clock frequency
4
1.2
1.4
Gsps
Minimum operating clock frequency(6)
410
Msps
Table 2-3.
Electrical Operating Characteristics: V
CCD = 5V, VEEA and VEED = -5V, LVDS Input Level, TJ = 85°C
(Continued)
Parameter
Symbol
Test
Level
Min
Typ
Max
Unit
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相關代理商/技術參數(shù)
參數(shù)描述
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