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參數資料
型號: TS8882VF20
文件頁數: 11/42頁
文件大小: 1703K
代理商: TS8882VF20
11
TS68882
2119A
12/01
Table 7.
AC Electrical Characteristics - Read and Write Cycles
V
CC
= 5.0 V
dc
± 10%; GND = 0 V
dc;
Tc = -55
°
C/+125
°
C or Tc = -40
°
C/+85
°
C (see Figure 7, Figure 8, Figure 9)
Parameter
16.67 MHz
20 MHz
25 MHz
33.33 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
6
Address valid to AS asserted
(5)
15
10
5
5
ns
6a
Address valid to DS asserted (read)
(5)
15
10
5
5
ns
6b
Address valid to DS asserted (write)
(5)
50
50
35
26
ns
7
AS negated to address invalid
(6)
10
10
5
5
ns
7a
DS negated to address invalid
(6)
10
10
5
5
ns
8
CS asserted to AS asserted or AS asserted
to CS asserted
(9)
0
0
0
0
ns
8a
CS asserted to DS asserted or DS asserted
to CS asserted (read)
(9)
0
0
0
0
ns
8b
CS asserted to DS asserted or DS asserted
to CS asserted (write)
(9)
30
25
20
15
ns
9
AS negated to CS negated
10
10
5
5
ns
9a
DS negated to CS negated
10
10
5
5
ns
10
R/W high to AS asserted (read)
15
10
5
5
ns
10a
R/W high to DS asserted (read)
15
10
5
5
ns
10b
R/W low to DS asserted (write)
35
30
25
25
ns
11
AS negated to R/W low (read) or
AS negated to R/W high (write)
10
10
5
5
ns
11a
DS negated to R/W low (read) or
DS negated to R/W high (write)
10
10
5
5
ns
12
DS width asserted (write)
40
38
30
23
ns
13
DS width negated
40
38
30
23
ns
13a
DS negated to AS asserted
(4)
30
30
25
18
ns
14
CS, DS asserted to data-out valid (read)
(2)
80
45
45
30
ns
15
DS negated to data-out invalid (read)
0
0
0
0
ns
16
DS negated to data-out high impedance
(read)
50
35
35
30
ns
17
Data-in invalid to DS asserted (write)
15
10
5
5
ns
18
DS negated to data-in invalid (write)
15
10
5
5
ns
19
START true to DSACK0 and DSACK1
asserted
(2)
50
35
25
20
ns
19a
DSACK0 asserted to DSACK1 asserted
(skew)
(7)
-15
15
-10
10
-10
10
5
ns
20
DSACK0 or DSACK1 asserted to data-out
valid
50
43
32
17
ns
21
START false to DSACK0 and DSACK1
negated
(8)
50
30
40
30
ns
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