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參數資料
| 型號： | TSA1401IFT |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | 7 X 7 MM, TQFP-48 |
| 文件頁數： | 12/19頁 |
| 文件大小： | 641K |
| 代理商： | TSA1401IFT |
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
TSA1401
ABSOLUTE MAXIMUM RATINGS
2/19
1
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
BLOCK DIAGRAM
Symbol
Parameter
Values
Unit
AVCC, DVCC, VCCBI
Analog, digital, digital buffer Supply voltage 1
1) All voltage values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages must not exceed -0.3V or VCC
-0.3V to 3.3V
V
VCCBE
Digital buffer Supply voltage 1
0V to 3.6V
V
VIN, VINB, VREFP,
VREFM, VINCM
Analog inputs
-0.3V to AVCC+0.3V
V
IDout
Digital output current
-100mA to 100mA
mA
Tstg
Storage temperature
+150
°C
ESD
Electrical Static Discharge
- HBM: Human Body Model2
- CDM-JEDEC Standard
2) ElectroStatic Discharge pulse (ESD pulse) simulating a human body discharge of 100 pF through 1.5k
2000
700
V
Latch-up
Class3
3) ST Microelectronics Corporate procedure number 0018695
A
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
AVCC
Analog Supply voltage
2.25
2.5
2.7
V
DVCC
Digital Supply voltage
2.25
2.5
2.7
V
VCCBI
Digital buffer Supply voltage
2.25
2.5
2.7
V
VCCBE
Digital buffer Supply voltage
2.25
2.5
3.3
V
stage
1
2
n
Reference
Timing
circuit
Sequencer-phase shifting
Digital data correction
Buffers
IPOL
VREFM
VREFP
CLK
+2.5V
VIN
VINB
DFSB
OEB
DR
DO
TO
D13
OR
INCM
GND
GNDA
REFMODE
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