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參數資料
| 型號： | TSA5520 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 1.3 GHz universal bus-controlled TV synthesizer(1.3 GHz通用總線控制的TV合成器) |
| 中文描述： | 1.3 GHz的通用總線控制的電視頻率合成器（1.3千兆赫通用總線控制的電視合成器） |
| 文件頁數： | 7/24頁 |
| 文件大小： | 285K |
| 代理商： | TSA5520 |
1996 Oct 10
7
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled
TV synthesizer
TSA5520; TSA5521
Table 2
Bus format selection
Table 3
I
2
C-bus data format
Table 4
Description of Table 3
PIN
NAME
3-WIRE BUS MODE
I
2
C BUS MODE
11
13
14
15
SW
SCL
SDA
CE
open or HIGH
clock input
data input
chip enable input
LOW
SCL input
SDA input/output
address selection input
BYTE
MSB
DATA BYTE
LSB
SLAVE ANSWER
Address Byte (ADB)
Divider Byte 1 (DB1)
Divider Byte 2 (DB2)
Control Byte (CB)
Band switch Byte (BB)
1
0
1
0
0
0
MA1
N10
N2
RSA
BS3
MA0
N9
N1
RSB
BS2
0
A
A
A
A
A
N14
N6
CP
X
N13
N5
T2
X
N12
N4
T1
X
N11
N3
T0
BS4
N8
N0
OS
BS1
N7
1
X
SYMBOL
DESCRIPTION
A
MA1 and MA0
N14 to N0
CP
T2 to T0
RSA and RSB
OS
acknowledge
programmable address bits (see Table 5)
programmable divider bits; N = N14
×
2
14
+ N13
×
2
13
+ ... + N1
×
2 + N0
charge-pump current; CP = 0 = 60
μ
A; CP = 1 = 280
μ
A
test bits (see Table 6); for normal operation T2 = 0, T1 = 0 and T0 = 1
reference divider ratio select bits (see Table 7)
tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON;
when OS = 1 tuning voltage is OFF (high impedance)
PNP band switch buffers control bits; when BS
n
= 0 buffer n is OFF;
when BS
n
= 1 buffer n is ON
don’t care
BS4 to BS1
X
Table 5
I
2
C-bus address selection
VOLTAGE APPLIED TO THE
CE INPUT (SW = LOW)
MA1
MA0
0 to 0.1V
CC1
Always valid
0.4V
CC1
to 0.6V
CC1
0.9V
CC1
to V
CC1
0
0
1
1
0
1
0
1
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相關代理商/技術參數 |
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|---|---|
| TSA5520M | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz universal bus-controlled TV synthesizer |
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| TSA5521M | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz universal bus-controlled TV synthesizer |
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