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參數(shù)資料
型號(hào): TSC2046IZQCT
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA48
封裝: 4 X 4 MM, ROHS COMPLIANT, PLASTIC, VFBGA-48
文件頁(yè)數(shù): 11/33頁(yè)
文件大小: 774K
代理商: TSC2046IZQCT
TSC2046
SBAS265G OCTOBER 2002 REVISED JANUARY 2008
www.ti.com
19
POWER DISSIPATION
There are two major power modes for the TSC2046:
full-power (PD0 = 1) and auto power-down (PD0 = 0).
When
operating
at
full
speed
and
16
clocks-per-conversion (see Figure 11), the TSC2046
spends most of the time acquiring or converting. There is
little time for auto power-down, assuming that this mode is
active. Therefore, the difference between full-power mode
and auto power-down is negligible. If the conversion rate
is decreased by slowing the frequency of the DCLK input,
the two modes remain approximately equal. However, if
the DCLK frequency is kept at the maximum rate during a
conversion but conversions are done less often, the
difference between the two modes is dramatic.
Figure 15 shows the difference between reducing the
DCLK frequency (scaling DCLK to match the conversion
rate) or maintaining DCLK at the highest frequency and
reducing the number of conversions per second. In the
latter
case,
the
converter
spends
an
increasing
percentage of time in power-down mode (assuming the
auto power-down mode is active).
1k
1M
10k
100k
f
SAMPLE (Hz)
S
u
p
ly
C
u
rr
ent
(
A)
1000
100
10
1
f
CLK =2MHz
S upply Current from
+V
CC and IO VD D
T
A =25C
+V
CC =2.7V
IOVDD = 1.8V
fCLK =16 fSAMPLE
Figure 15. Supply Current versus Directly Scaling
the Frequency of DCLK with Sample Rate or
Maintaining DCLK at the Maximum Possible
Frequency
Another important consideration for power dissipation is
the reference mode of the converter. In the single-ended
reference mode, the touch panel drivers are ON only when
the analog input voltage is being acquired (see Figure 9
and Table 1). The external device (e.g., a resistive touch
screen), therefore, is only powered during the acquisition
period. In the differential reference mode, the external
device must be powered throughout the acquisition and
conversion periods (see Figure 9). If the conversion rate is
high, this could substantially increase power dissipation.
CS also puts the TSC2046 into power-down mode. When
CS goes high, the TSC2046 immediately goes into
power-down mode and does not complete the current
conversion. The internal reference, however, does not turn
off with CS going high. To turn the reference off, an
additional write is required before CS goes high (PD1 = 0).
When the TSC2046 first powers up, the device draws
about 20
A of current until a control byte is written to it with
PD0 = 0 to put it into power-down mode. This can be
avoided if the TSC2046 is powered up with CS = 0 and
DCLK = IOVDD.
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