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參數(shù)資料
| 型號(hào)： | TSC2111IRGZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, QCC48 |
| 封裝： | PLASTIC, QFN-48 |
| 文件頁(yè)數(shù)： | 16/99頁(yè) |
| 文件大?。?/td> | 1143K |
| 代理商： | TSC2111IRGZT |
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TSC2111
SLAS495A JUNE 2006 REVISED OCTOBER 2007
www.ti.com
23
D When PLL is enabled
Fsref
+ MCLK
K
2048
P
P = 1, 2, 3
… 8
K = J.D
J = 1, 2, 3
….63
D = 0, 1, 2
… 9999
P, J and D are register programmable. where J is integer part of K before the decimal point, and D
is four-digit fractional part of K after the decimal point, including lagging zeros.
Examples: If K = 8.5, then J = 8, D = 5000
If K = 7.12, then J = 7, D = 1200
If K = 7.012, then J = 7, D = 120
The PLL is programmed through Registers 1BH and 1CH of Page 2.
D When PLL is enabled and D = 0, the following conditions must be satisfied
2MHz
v MCLK
P
v 20 MHz
80 MHz
v MCLK
K
P
v 110 MHz
4 v J v 55
D When PLL is enabled D ≠ 0, the following conditions must be satisfied
10 MHz
v MCLK
P
v 20 MHz
80 MHz
v MCLK
K
P
v 110 MHz
4 v J v 11
Example 1:
For MCLK = 12 MHz and Fsref = 44.1 kHz
P = 1, K = 7.5264
J = 7, D = 5264
Example 2:
For MCLK = 12 MHz and Fsref = 48 kHz
P = 1, K = 8.192
J = 8, D = 1920
Table 1. Fsref = 44.1 kHz
MCLK (MHz)
P
J
D
ACHIEVED FSREF
% ERROR
2.8224
1
32
0
44100.00
0.0000
5.6448
1
16
0
44100.00
0.0000
12.0
1
7
5264
44100.00
0.0000
13.0
1
6
9474
44099.71
0.0007
16.0
1
5
6448
44100.00
0.0000
19.2
1
4
7040
44100.00
0.0000
19.68
1
4
5893
44100.30
0.0007
48
4
7
5264
44100.00
0.0000
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