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參數(shù)資料
| 型號： | TZA1047HL/M3 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.4 MM HEIGHT, PLASTIC, MS-026, SOT314-2, LQFP-64 |
| 文件頁數(shù)： | 4/69頁 |
| 文件大小： | 324K |
| 代理商： | TZA1047HL/M3 |
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9397 750 14664
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 1 June 2005
12 of 69
Philips Semiconductors
TZA1047
Preprocessor IC for CD and DVD rewritable
The Distributor combines and processes the (optionally sampled) signals VSA to VSH
coming from the Input circuit to produce the servo signals Q1 to Q6 and the input signals
for the FTC and for the push-pull processor. Sections Section 7.5.1 to Section 7.5.4
describe how the Distributor output signals are derived.
7.5.1 Signals Q1 to Q6
Refer to Figure 5.
The servo currents Q1 to Q4 are offset-free and ltered current versions of the segment
voltages VSA to VSD. They are converted from voltage to current by the resistance RQ.
The signals Q5 and Q6 depend on the servo mode (3-spot CA, 3-spot PP or DPD).
Segment signals VSA to VSH are converted from voltages to currents. The currents are
low-pass ltered to remove the EFM noise from the signals if no sampling is applied
during read and write.
Offset compensation can be applied by adding an offset current to each of the 8 segment
signals to cancel the offset in the segment signal from the PDIC. Separate offsets can be
specied to cancel the different offsets for read and write. For read, the offsets are set by
5-bit registers ORA to ORH, for write, by registers OWA to OWH. In order to specify the
correct value for a specic offset register, the offset for the corresponding segment is
measured externally via signals Q1 to Q4. The gain control bits GCAL[1:0] set the
measured offset current to within the range of the measuring device; a range of 0
A
to 10
A is suitable for most Philips decoders. The gain adjusted central segment signals
QA to QD and satellite segment signals QE to QH can be swapped by setting bit
CALSAT to logic 1 to allow all QA to QH signals to be measured externally via Q1 to Q4.
After offset cancelling, the central segment signals Q1 to Q4 are routed to the Distributor
output as offset-free and ltered current signal versions of the segment voltage signals
VSA to VSD.
Note that Q3 corresponds to QD and that Q4 corresponds to QC. These signal
associations were swapped over in earlier Philips preprocessor devices.
The characteristics of signals Q5 and Q6 depend on the status of bit CA/PP and bit DPD;
see Table 5.
Symbol
γ is the gain factor which compensates for the power difference between the
central spot and the satellite spot. This is determined by the grating ratio of the OPU and
possibly gain differences between the central and satellite segments in the PDIC. The
value of
γ is controlled by bit GRAT and control word AT[7:0].
7.5.2 Signal Qs
Qs is the sum of the central segment signals and is used in the DPD circuit for drop-out
concealment detection. It is dened by:
Table 5:
Q5/Q6 modes
Servo Mode
CA/PP
Q5
Q6
3-spot PP
0
γ× (QE + QG)
γ× (QF + QH)
3-spot CA
1
γ× (QE + QF)
γ× (QG + QH)
Q
S
0.2
Q
A
Q
B
Q
C
Q
D
++
+
()
×
=
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