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參數資料
| 型號： | TZA3013BU |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網絡 |
| 英文描述： | SDH/SONET STM16/OC48 transimpedance amplifier |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, UUC15 |
| 封裝： | DIE-15 |
| 文件頁數： | 9/16頁 |
| 文件大小： | 104K |
| 代理商： | TZA3013BU |
2001 Feb 26
9
Philips Semiconductors
Product specification
SDH/SONET STM16/OC48
transimpedance amplifier
TZA3013A; TZA3013B
Notes
1.
2.
Measurement performed with C
i
= 0.5 pF comprising 0.4 pF (photodiode) and 0.1 pF (allowed for PCB layout).
PSRR is defined as the ratio of change in input current (
I
i
) corresponding to change in supply voltage (
V
CC
):
I
CC
For example, a 4 mV disturbance on V
CC
at 10 MHz will typically add an extra 120 nA to I
i
(photodiode output
current). The value of the external capacitor connected between pads DREF and GND has a significant effect on the
value of PSRR. The specification is valid with an external capacitor of 1 nF.
PSRR
power supply rejection ratio
measured differentially;
note 2
f
i
= 100 kHz to 100 MHz
f
i
= 3 GHz
38
3.2
μ
A/V
mA/V
Automatic gain control loop: AGC
t
att
t
decay
I
th(AGC)(p-p)
AGC attack time
AGC decay time
AGC threshold current
(peak-to-peak value)
10
10
50
μ
s
μ
s
μ
A
referenced to input
Bias voltage: DREF
R
DREF
resistance between DREF
and V
CC
Inputs: IN and INQ
tested at DC level
240
270
340
I
i(p-p)
input current
(peak-to-peak value)
input bias voltage
small-signal input
resistance
1700
+1700
μ
A
V
I(bias)
R
i
700
860
53
1100
mV
tested at 1 MHz;
I
i
< 20
μ
A (p-p)
Data outputs: OUT and OUTQ
V
o(cm)
common mode output
voltage
single-ended load output
voltage (peak-to-peak
value)
differential output offset
voltage
output resistance
rise time
fall time
AC-coupled; R
L
= 50
V
CC
0.5 V
CC
0.25 V
CC
0.1
V
V
o(se)(p-p)
AC-coupled; R
L
= 50
;
I
i
= 100
μ
A (p-p)
45
110
200
mV
V
OO
100
0
+100
mV
R
o
t
r
t
f
single-ended; DC tested
20% to 80%
80% to 20%
40
53
200
200
65
ps
ps
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PSRR
---V
=
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