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參數資料
型號: U404
廠商: Vishay Intertechnology,Inc.
英文描述: Monolithic Dual N-Channel JFET(最小柵源擊穿電壓-40V的單片雙N溝道結型場效應管)
中文描述: 單片雙N溝道場效應(最小柵源擊穿電壓至40V的單片雙?溝道結型場效應管)
文件頁數: 1/5頁
文件大小: 79K
代理商: U404
SST/U401 Series
Siliconix
S-52424—Rev. E, 14-Apr-97
1
Monolithic N-Channel JFET Duals
SST404
SST406
U401
U404
U406
Product Summary
Part Number
V
GS(off)
(V)
V
(BR)GSS
Min (V)
g
fs
Min (mS)
I
G
Typ (pA)
V
GS1
– V
GS2
Max (mV)
U401
–0.5 to –2.5
–40
1
–2
5
SST/U404
–0.5 to –2.5
–40
1
–2
15
SST/U406
–0.5 to –2.5
–40
1
–2
40
Features
Monolithic Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 2 pA
Low Noise
High CMRR: 102 dB
Benefits
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signal
Applications
Wideband Differential Amps
High-Speed,Temp-Compensated,
Single-Ended Input Amps
High-Speed Comparators
Impedance Converters
Description
The SST/U401 series of high-performance monolithic dual
JFETs features extremely low noise, tight offset voltage and
low drift over temperature specifications, and is targeted for
use in a wide range of precision instrumentation
applications. This series has a wide selection of offset and
drift specifications with the U401 featuring a 5-mV offset
and 10- V/ C drift.
The U series’ hermetically sealed TO-71 package is
available with full military processing (see Military
Information). The SST series SO-8 package provides ease
of manufacturing, and the symmetrical pinout prevents
improper orientation. The SO-8 package is available with
tape-and-reel options for compatibility with automatic
assembly methods (see Packaging Information).
For similar high-gain products in TO-78 packaging, see
the 2N5911/5912 data sheet.
TO-71
Top View
U401, U404, U406
G
1
S
1
D
1
G
2
D
2
S
2
1
2
3
6
5
4
S
1
D
1
G
1
NC
NC
G
2
D
2
S
2
Narrow Body SOIC
5
6
7
8
2
3
4
1
Top View
SST404, SST406
Absolute Maximum Ratings
Gate-Drain, Gate-Source Voltage
–40 V
. . . . . . . . . . . . . . . . . . . . . . . .
Gate Current
Lead Temperature (
1
/
16
” from case for 10 sec.)
Storage Temperature :
10 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
300 C
. . . . . . . . . . . . .
U Prefix
SST Prefix
–65 to 200 C
–55 to 150 C
. . . . . . . . . . . . . .
. . . . . . . . . . . .
Operating Junction Temperature
Power Dissipation :
–55 to 150 C
300 mW
500 mW
. . . . . . . . . . . . . . . . . .
Per Side
a
. . . . . . . . . . . . . . . . .
Total
b
. . . . . . . . . . . . . . . . . . . .
Notes
a.
b.
Derate 2.4 mW/ C above 25 C
Derate 4 mW/ C above 25 C
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70247.
Applications information may also be obtained via FaxBack, request document #70599.
相關PDF資料
PDF描述
U401 Monolithic Dual N-Channel JFET(最小柵源擊穿電壓-40V的單片雙N溝道結型場效應管)
U406 Monolithic Dual N-Channel JFET(最小柵源擊穿電壓-40V的單片雙N溝道結型場效應管)
U421 Monolithic Dual N-Channel JFET(最小柵源擊穿電壓-40V,柵極工作電流-0.25pA的單片雙N溝道結型場效應管)
U423 Monolithic Dual N-Channel JFET(最小柵源擊穿電壓-40V,柵極工作電流-0.25pA的單片雙N溝道結型場效應管)
U430 Matched N-Channel Pairs
相關代理商/技術參數
參數描述
U404 SIL83 制造商:SIL 功能描述:404N S9G3A
U404 制造商:Vishay Siliconix 功能描述:TRANSISTOR JFET DUAL N TO-71
U404_TO-71 制造商:MICROSS 制造商全稱:MICROSS 功能描述:Low Noise, Low Drift, Monolithic Dual N-Channel JFET
U404_TO-78 制造商:MICROSS 制造商全稱:MICROSS 功能描述:Low Noise, Low Drift, Monolithic Dual N-Channel JFET
U404-E3 功能描述:JFET Dual Matched RoHS:否 制造商:ON Semiconductor 晶體管極性:N-Channel 漏極電流(Vgs=0 時的 Idss):50 mA 漏源電壓 VDS:15 V 閘/源擊穿電壓: 漏極連續電流:50 mA 配置: 安裝風格: 封裝 / 箱體:SC-59 封裝:Reel
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