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參數資料
型號: U635H64D1K45G1
英文描述: PowerStore 8K x 8 nvSRAM
中文描述: PowerStore 8K的× 8非易失
文件頁數: 12/14頁
文件大小: 149K
代理商: U635H64D1K45G1
U635H64
12
March 31, 2006
STK Control #ML0052
Rev 1.0
Software Nonvolatile RECALL
A RECALL cycle of the EEPROM data into the SRAM
is initiated with a sequence of READ operations in a
manner similar to the STORE initiation. To initiate the
RECALL cycle the following sequence of READ opera-
tions must be performed:
1.
2.
3.
4.
5.
6.
Read address
Read address
Read address
Read address
Read address
Read address
0000
1555
0AAA (hex) Valid READ
1FFF
(hex) Valid READ
10F0
(hex) Valid READ
0F0E
(hex) Initiate RECALL
(hex) Valid READ
(hex) Valid READ
Internally, RECALL is a two step procedure. First, the
SRAM data is cleared and second, the nonvolatile
information is transferred into the SRAM cells. The
RECALL operation in no way alters the data in the
EEPROM cells. The nonvolatile data can be recalled an
unlimited number of times.
Hardware Protection
The U635H64 offers hardware protection against inad-
vertent STORE operation through V
CC
Sense. When
V
CC
< V
SWITCH
all software controlled STORE operati-
ons will be inhibited.
Low Average Active Power
The U635H64 has been designed to draw significantly
less power when E is LOW (chip enabled) but the
access cycle time is longer than 55 ns.
When E is HIGH the chip consumes only standby cur-
rent.
The overall average current drawn by the part depends
on the following items:
1. CMOS or TTL input levels
2. the time during which the chip is disabled (E HIGH)
3. the cycle time for accesses (E LOW)
4. the ratio of READs to WRITEs
5. the operating temperature
6. the V
CC
level
The information describes the type of component and shall not be considered as assured characteristics. Terms of
delivery and rights to change design reserved.
相關PDF資料
PDF描述
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相關代理商/技術參數
參數描述
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