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參數資料
型號: UDA1321T
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Universal Serial Bus USB Digital-to-Analog Converter DAC
中文描述: 0.055 MHz, MICROCONTROLLER, PDSO28
文件頁數: 18/44頁
文件大小: 280K
代理商: UDA1321T
1998 Oct 06
18
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB)
Digital-to-Analog Converter (DAC)
UDA1321
Fig.6 Diode matrix selection.
handbook, full pagewidth
MGM109
10 nF
10 nF
22 pF
22 pF
4
6
5
3
2
1
USB-B
connector
Vbus
22
22
D
D
+
GP5
GP3
GP0
1.5 k
22 k
22 k
22 k
22 k
22 k
22 k
TR3
TR1
TR2
3.3 V
3.3 V
3.3 V
3.3 V
22 k
Vbus
1
2
D2
1
2
D1
KEY 1
SW1
KEY 2
SW2
Start-up and configuration of the UDA1321
S
TART
-
UP OF THE
UDA1321
After power-on, an internal power-on reset signal becomes
HIGH after a certain RC-time (R = 5 k
and C = C
ref
).
During 10 ms after power-on reset the UDA1321 has to
initiate the internal settings. After the power-on reset the
UDA1321 becomes master of the I
2
C-bus. The UDA1321
tries to read the eventually connected EEPROM and if an
EEPROM is detected, the internal descriptors are
overwritten and the selected port configuration is applied.
If no EEPROM is detected, the UDA1321 tries to read the
logical levels of GP3 and GP0. A choice can be made from
four configuration maps via these two pins.
C
ONFIGURATION SELECTION OF THE
UDA1321
VIA A DIODE
MATRIX
The UDA1321 uses a configuration map to hold a number
of specific configurable data on hardware, product,
component and USB configuration level. At start-up
without EEPROM, the UDA1321 will scan the logical levels
of GP3 and GP0. With these two pins it is possible to
select one of the four possible (vendor specific)
configuration maps. This selection can be achieved via a
diode matrix (see Fig.6).
After selecting a configuration map the user cannot
change the chosen settings for the GP pins, internal
configuration, descriptors, etc.
For more information about the four (vendor specific)
configuration maps and the diode matrix see the
application documentation.
C
ONFIGURATION OPTIONS OF THE
UDA1321
VIA AN
I
2
C-
BUS
EEPROM
If an EEPROM is detected (reading byte 0 as AAH and
byte 1 as 55H), the UDA1321 will use the configuration
map in the EEPROM instead of one of four configuration
maps. The layout of the configuration map is fixed, the
values (except bytes 0 and 1) are user definable (see
Table 6). If the user wants to change these values
(the manufacturers name for instance), this can be
achieved via the EEPROM code.
The communication between the UDA1321 and the
external I
2
C-bus device is based on the standard I
2
C-bus
protocol given in the Philips specification “The I
2
C-bus and
how to use it (including specifications)” which can be
ordered using the code 9398 393 40011. The I
2
C-bus has
two lines: a clock line SCL and a serial data line SDA
(see Fig.7).
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相關代理商/技術參數
參數描述
UDA1321T/N101 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus USB Digital-to-Analog Converter DAC
UDA1324TS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Ultra low-voltage stereo filter DAC
UDA1325 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus USB CODEC
UDA1325H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus USB CODEC
UDA1325PS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus USB CODEC
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