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參數資料
型號: UPA1710AG
英文描述: TRANSISTOR | MOSFET | P-CHANNEL | 30V V(BR)DSS | 5A I(D) | SO
中文描述: 晶體管| MOSFET的| P通道| 30V的五(巴西)直| 5A條(丁)|蘇
文件頁數: 1/8頁
文件大小: 68K
代理商: UPA1710AG
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
1999, 2000, 2001
MOS FIELD EFFECT TRANSISTOR
μ
PA1727
SWITCHING
N-CHANNEL POWER MOS FET
DATA SHEET
Document No.
Date Published
Printed in Japan
G14330EJ3V0DS00 (3rd edition)
March 2002 NS CP(K)
The mark
#
shows major revised points.
DESCRIPTION
The
μ
PA1727 is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
Single chip type
Low on-state resistance
R
DS(on)1
= 14 m
TYP. (V
GS
= 10 V, I
D
= 5.0 A)
R
DS(on)2
= 17 m
TYP. (V
GS
= 4.5 V, I
D
= 5.0 A)
R
DS(on)3
= 19 m
TYP. (V
GS
= 4.0 V, I
D
= 5.0 A)
Low C
iss
: C
iss
= 2400 pF TYP.
Built-in G-S protection diode
Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
μ
PA1727G
Power SOP8
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
60
V
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
±20
V
Drain Current (DC)
Drain Current (Pulse)
Note1
Total Power Dissipation (T
A
= 25°C)
Note2
I
D(DC)
±10
A
I
D(pulse)
±40
A
P
T
2.0
W
Channel Temperature
T
ch
150
°C
Storage Temperature
Single Avalanche Current
Note3
Single Avalanche Energy
Note3
Notes 1.
PW
10
μ
s, Duty Cycle
1%
2.
Mounted on ceramic substrate of 1200 mm
2
x 2.2 mm
3.
Starting T
ch
= 25°C, V
DD
= 30 V, R
G
= 25
,
V
GS
= 20
0 V
T
stg
–55 to + 150
°C
I
AS
10
A
E
AS
200
mJ
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Protection
Diode
Gate
Drain
PACKAGE DRAWING (Unit: mm)
1.27
0.12 M
6.0 ±0.3
4.4
0.40
+0.10
0.78 Max.
0
1
1
0.8
0.5 ±0.2
0
+
5.37 Max.
0.10
1
4
8
5
1, 2, 3
4
5, 6, 7, 8
; Source
; Gate
; Drain
#
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