- 您現在的位置：買賣IC網 > PDF目錄384043 > UPD45128163G5-A75T-9JF (ELPIDA MEMORY INC) 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range) PDF資料下載
參數資料
| 型號： | UPD45128163G5-A75T-9JF |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range) |
| 中文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | PLASTIC, TSOP2-54 |
| 文件頁數： | 1/86頁 |
| 文件大小： | 774K |
| 代理商： | UPD45128163G5-A75T-9JF |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for
availability and additional information.
MOS INTEGRATED CIRCUIT
μ
PD45128163-T
128M-bit Synchronous DRAM
4-bank, LVTTL
WTR (Wide Temperature Range)
DATA SHEET
Document No. E0348N10 (Ver.1.0)
Date Published February 2003 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
Elpida Memory, Inc. 2003
Description
The
μ
PD45128163 is high-speed 134,217,728-bit synchronous dynamic random-access memory, organized as
2,097,152
×
16
×
4 (word
×
bit
×
bank).
The synchronous DRAM achieved high-speed data transfer using the pipeline architecture.
All inputs and outputs are synchronized with the positive edge of the clock.
The synchronous DRAM is compatible with Low Voltage TTL (LVTTL).
This product is packaged in 54-pin TSOP (II).
Features
Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
Pulsed interface
Possible to assert random column address in every cycle
Quad internal banks controlled by BA0(A13) and BA1(A12)
Byte control by LDQM and UDQM
Programmable Wrap sequence (Sequential / Interleave)
Programmable burst length (1, 2, 4, 8 and full page)
Programmable /CAS latency (2 and 3)
Ambient temperature (T
A
):
20 to + 85
°
C
Automatic precharge and controlled precharge
CBR (Auto) refresh and self refresh
×
16 organization
Single 3.3 V
±
0.3 V power supply
LVTTL compatible inputs and outputs
4,096 refresh cycles / 64 ms
Burst termination by Burst stop command and Precharge command
相關PDF資料 |
PDF描述 |
|---|---|
| UPD45128163G5-A10T-9JF | 128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range) |
| UPD45128163G5-A80-9JF | 128M-bit Synchronous DRAM 4-bank, LVTTL |
| UPD45128441G5-A10-9JF | 128M-bit Synchronous DRAM 4-bank, LVTTL |
| UPD45128163G5-A80L-9JF | 128M-bit Synchronous DRAM 4-bank, LVTTL |
| UPD45128163G5-A75L-9JF | 128M-bit Synchronous DRAM 4-bank, LVTTL |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UPD45128841G5-A75-9JF | 制造商:NEC Electronics Corporation 功能描述:SDRAM, 16M x 8, 54 Pin, Plastic, TSOP |
| UPD4516161AG5A109NF | 制造商:NEC Electronics Corporation 功能描述: |
| UPD4516161AG5-A10-9NF | 制造商:NEC Electronics Corporation 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP |
| UPD4528BC | 制造商:Panasonic Industrial Company 功能描述:IC |
| UPD4528C | 制造商:Panasonic Industrial Company 功能描述:IC SUB:TC4528BP OR TVSTC4528BP |
發布緊急采購，3分鐘左右您將得到回復。