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參數資料
| 型號： | W25S243AF-12 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | DIODE SCHOTTKY QUAD SERIES (RAIL CLAMP) 25V 200mW 0.35V-vf 200mA-IFM 1mA-IF 2uA-IR SOT-363 3K/REEL |
| 中文描述： | 64K X 64 STANDARD SRAM, 12 ns, PQFP128 |
| 封裝： | QFP-128 |
| 文件頁數： | 6/17頁 |
| 文件大小： | 303K |
| 代理商： | W25S243AF-12 |
Preliminary W25S243A
- 6 -
Write Table, continued
READ/WRITE FUNCTION
GW
BWE
BW8
BW7
BW6
BW5
BW4
BW3
BW2
BW1
Write byte 5, byte 2
1
0
1
1
1
0
1
1
0
1
Write byte 5, byte 2, byte 1
1
0
1
1
1
0
1
1
0
0
Write byte 5, byte 3
1
0
1
1
1
0
1
0
1
1
Write byte 5, byte 3, byte 1
1
0
1
1
1
0
1
0
1
0
Write byte 5, byte 3, byte 2
1
0
1
1
1
0
1
0
0
1
Write byte 5, byte 3, byte 2, byte 1
1
0
1
1
1
0
1
0
0
0
Write byte 5, byte 4
1
0
1
1
1
0
0
1
1
1
Write byte 5, byte 4, byte 1
1
0
1
1
1
0
0
1
1
0
Write byte 5, byte 4, byte 2
1
0
1
1
1
0
0
1
0
1
Write byte 5, byte 4, byte 2, byte 1
1
0
1
1
1
0
0
1
0
0
Write byte 5, byte 4, byte 3
1
0
1
1
1
0
0
0
1
1
Write byte 5, byte 4, byte 3, byte 1
1
0
1
1
1
0
0
0
1
0
Write byte 5, byte 4, byte 3, byte 2
1
0
1
1
1
0
0
0
0
1
Write byte 5, byte 4, byte 3, byte 2,
byte 1
1
0
1
1
1
0
0
0
0
0
Write byte 6
1
0
1
1
0
1
1
1
1
1
Write byte 6, byte 1
1
0
1
1
0
1
1
1
1
0
Write byte 6, byte 2
1
0
1
1
0
1
1
1
0
1
Write byte 6, byte 2, byte 1
1
0
1
1
0
1
1
1
0
0
..... and so on .....
...
...
...
...
...
...
...
...
...
...
Write byte 8, byte 7, byte 6, byte 5,
byte 4, byte 2, byte 1
1
0
0
0
0
0
0
1
0
0
Write byte 8, byte 7, byte 6, byte 5,
byte 4, byte 3
1
0
0
0
0
0
0
0
1
1
Write byte 8, byte 7, byte 6, byte 5,
byte 4, byte 3, byte 1
1
0
0
0
0
0
0
0
1
0
Write byte 8, byte 7, byte 6, byte 5,
byte 4, byte 3, byte 2
1
0
0
0
0
0
0
0
0
1
Write all bytes
1
0
0
0
0
0
0
0
0
0
Write all bytes
0
x
x
x
x
x
x
x
x
x
The ZZ state is a low-power state in which the device consumes less power than in the unselected
mode. Enabling the ZZ pin for a fixed period of time will force the SRAM into the ZZ state. Pulling the
ZZ pin low for a set period of time will wake up the SRAM again. While the SRAM is in ZZ mode, data
retention is guaranteed, but the chip will not monitor any input signal except for the ZZ pin. In the
unselected mode, on the other hand, all the input signals are monitored.
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