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參數資料
| 型號： | W26L010AT-12 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 16 High Speed CMOS Static RAM |
| 中文描述： | 64K X 16 STANDARD SRAM, 12 ns, PDSO44 |
| 封裝： | TSOP2-44 |
| 文件頁數： | 8/10頁 |
| 文件大?。?/td> | 131K |
| 代理商： | W26L010AT-12 |
W26L010A
- 8 -
Timing Waveforms, continued
Write Cycle 2
(OE = V
IL
Fixed)
Address
WE
D
D
T
T
T
T
T
T
T
(2)
(3)
T
T
WC
AW
WP
OW
WHZ (1, 4)
DW
DH
OH
AS
OUT
IN
CS
T
T
CW
WR
UB/LB
T
BW
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from D
OUT
are the same as the data written to D
IN
during the write cycle.
3. D
OUT
provides the read data for the next address.
4. Transition is measured
±
500 mV from steady state with C
L
= 5 pF. This parameter is guaranteed but not 100% tested.
ORDERING INFORMATION
PART NO.
ACCESS
TIME
(nS)
OPERATING
CURRENT
MAX. (mA)
STANDBY
CURRENT
MAX. (mA)
PACKAGE
W26L010AJ-10
10
160
10
44-pin 400 mil SOJ
W26L010AJ-12
12
140
10
44-pin 400 mil SOJ
W26L010AT-10
10
160
10
44-pin TSOP
W26L010AT-12
12
140
10
44-pin TSOP
Notes:
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in
applications where personal injury might occur as a consequence of product failure.
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| W26L010AJ-12 | 64K X 16 High Speed CMOS Static RAM |
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