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參數(shù)資料
| 型號： | W981216AH-8H |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | x16 SDRAM |
| 中文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54 |
| 封裝： | 0.400 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁數(shù)： | 1/44頁 |
| 文件大小： | 2173K |
| 代理商： | W981216AH-8H |
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W981216AH
2M x 16 bit x 4 Banks SDRAM
Revision 1.0 Publication Release Date: March, 1999
- 1 -
Features
3.3V
±
0.3V power supply
Up to 133 MHz clock frequency
2,097,152 words x 4 banks x 16 bits organization
Auto Refresh and Self Refresh
CAS latency: 2 and 3
Burst Length: 1, 2, 4, 8 , and full page
Burst read, Single Writes Mode
Byte data controlled by UDQM and LDQM
Power-Down Mode
Auto-Precharge and controlled precharge
4k refresh cycles / 64ms
Interface: LVTTL
Package: TSOP II 54 pin, 400 mil - 0.80
General Description
W981216AH is a high speed synchronous dynamic random access memory (SDRAM) , organized as 2M words x 4 banks x
16 bits. Using pipelined architecture and 0.20um process technology, W981216AH delivers a data bandwidth of up to 266M
bytes per second (-75). To fully comply to the personal computer industrial standard, W981216AH is sorted into two speed
grades: -75 and -8H. The -75 is compliant to the PC133/CL3 specification, the –8H is compliant to PC100/CL2 specification.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of
1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated
by the SDRAM internal counrter in burst operation. Random column read is also possible by providing its address at each clock
cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst legnth, latency cycle, interleave or sequential burst
to maximize its performance. W981216AH is ideal for main memory in high performance applications.
Key Parameters
Symbol
Description
min/max
t
CK
Clock Cycle Time
min
t
AC
Access Time from CLK
max
t
RP
Precharge to Active Command
min
t
RCD
Active to Read/Write Command
min
I
CC1
Operation Current ( Single bank )
max
I
CC4
Burst Operation Current
max
I
CC6
Self-Refresh Current
max
-75 (PC133)
7.5ns
5.4ns
20ns
20ns
85mA
120mA
2mA
-8H (PC100)
8ns
6ns
20ns
20ns
80mA
110mA
2mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W981616BH | 512K ⅴ 2 BANKS ⅴ 16 BITS SDRAM |
| W981616AH | 512K x 2 BANKS x 16 BIT SDRAM |
| W981616AH-6 | x16 SDRAM |
| W981616AH-7 | x16 SDRAM |
| W981616AH-8 | x16 SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W981216BH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M x 4 BANKS x 16 BIT SDRAM |
| W981216BH-75 | 制造商:Winbond Electronics Corp 功能描述:SDRAM, 8M x 16, 54 Pin, Plastic, TSOP |
| W9812G2GB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M 】 4 BANKS 】 32BITS SDRAM |
| W9812G2GB-6 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M 】 4 BANKS 】 32BITS SDRAM |
| W9812G2GB-6I | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M 】 4 BANKS 】 32BITS SDRAM |
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