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參數資料
型號: XR16V2652IJ-F
廠商: Exar Corporation
文件頁數: 1/48頁
文件大小: 0K
描述: IC UART FIFO 32B DUAL 44PLCC
標準包裝: 27
特點: *
通道數: 2,DUART
FIFO's: 32 字節
規程: RS232,RS422
電源電壓: 2.25 V ~ 3.6 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應商設備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16V2652
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
MAY 2007
REV. 1.0.2
GENERAL DESCRIPTION
The XR16V26521 (V2652) is a high performance dual
universal asynchronous receiver and transmitter
(UART) with 32 byte TX and RX FIFOs. The device
operates from 2.25 to 3.6 volts with 5 Volt tolerant
inputs and is pin-to-pin compatible to Exar’s
ST16C2552,
XR16L2552,
XR16V2552
and
XR16L2752. The V2652 register set is compatible to
the ST16C2552 and the XR16V2552. It supports the
Exar’s enhanced features of selectable FIFO trigger
level, automatic hardware (RTS/CTS) and software
flow control and a complete modem interface.
Onboard registers provide the user with operational
status and data error flags. An internal loopback
capability allows system diagnostics. Independent
programmable baud rate generators are provided in
each channel to select data rates up to 16 Mbps at
3.3 Volt with 4X sampling clock. The V2652 is
available in 44-pin PLCC and 32-pin QFN packages.
NOTE: 1 Covered by U.S. Patent #5,649,122
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
FEATURES
2.25 to 3.6 Volt Operation
5 Volt Tolerant Inputs
Pin-to-pin compatible to Exar’s XR16V2752 in the
44-PLCC package
Two independent UART channels
Register set compatible to ST16C2552
Data rate of up to 16 Mbps at 3.3 V and
12.5 Mbps at 2.5 V with 4X sampling rate
Fractional Baud Rate Generator
Transmit and Receive FIFOs of 32 bytes
Selectable TX and RX FIFO Trigger Levels
Automatic Hardware (RTS/CTS) Flow Control
Automatic Software (Xon/Xoff) Flow Control
Wireless Infrared (IrDA 1.0) Encoder/Decoder
Automatic sleep mode
Full modem interface
Alternate Function Register
Device Identification and Revision
Crystal oscillator or external clock input
Crystal oscillator (up to 32 MHz) or external clock
(up to 64 MHz) input
44-PLCC and 32-QFN packages
FIGURE 1. XR16V2652 BLOCK DIAGRAM
XTAL1
XTAL2
Crystal Osc/Buffer
TXA, RXA, DTRA#,
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
8-bit Data
Bus
Interface
UART Channel A
32 Byte TX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
2.25 to 3.6 Volt VCC
GND
* 5 Volt Tolerant Inputs
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
UART Channel B
(same as Channel A)
A2:A0
D7:D0
CS#
CHSEL
INTA
INTB
IOW#
IOR#
Reset
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#
32 Byte RX FIFO
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相關代理商/技術參數
參數描述
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XR16V2652ILTR-F 制造商:Exar Corporation 功能描述:UART 2-CH 32Byte FIFO 2.5V/3.3V 32-Pin QFN EP T/R 制造商:Exar Corporation 功能描述:XR16V2652ILTR-F
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