
Z8 Microcontrollers
ZiLOG
Instruction Descriptions and Formats
UM001600-Z8X0599
12-57
RLC
ROTATE LEFT THROUGH CARRY
RLC
Rotate Left Through Carry
RLC dst
Instruction Format:
Operation:
C<— dst(7)
dst(0) <— C
dst(1) <— dst(0)
dst(2) <— dst(1)
dst(3) <— dst(2)
dst(4) <— dst(3)
dst(5) <— dst(4)
dst(6) <— dst(5)
dst(7) <— dst(6)
The contents of the destination operand along with the C Flag are rotated left by one bit position. The
initial value of bit 7 replaces the C Flag and the initial value of the C Flag replaces bit 0.
Note:
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the destination
Working Register operand is specified by adding 1110B (EH) to the high nibble of the operand. For
example, if Working Register R12 (CH) is the destination operand, then ECH will be used as the
destination operand in the Op Code.
OPC
dst
6
6
Cycles
OPC
(Hex)
Address Mode
dst
10
11
R
IR
D7 D6 D5 D4 D3 D2 D1 D0
C
Flags:
C:
Z:
S:
V:
Set if the bit rotated from the most significant bit position was 1 (i.e., bit 7 was 1).
Set if the result is zero; cleared otherwise.
Set if the result bit 7 is set; cleared otherwise.
Set if arithmetic overflow occurred (if the sign of the destination operand changed during
rotation); cleared otherwise.
Unaffected
Unaffected
D:
H:
E
dst