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參數資料
| 型號： | Z86E8316PSC |
| 英文描述： | Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:50mA; Package/Case:3-TO-220; Current, It av:10A; Holding Current:50mA |
| 中文描述： | 單片機| 8位| Z8的CPU |的CMOS |雙酯| 28腳|塑料 |
| 文件頁數： | 40/52頁 |
| 文件大小： | 483K |
| 代理商： | Z86E8316PSC |
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Z86C83/C84/E83
CMOS Z8
MCU
Zilog
8-40
P R E L I M I N A R Y
DS97DZ80700
In order to enter STOP (or HALT) Mode, it is necessary to
first flush the instruction pipeline to avoid suspending exe-
cution in mid-instruction. To do this, the user must execute
a NOP (Opcode = FFH) immediately before the appropri-
ate sleep instruction, that is
,
Stop-Mode Recovery (SMR) Register.
This register se-
lects the clock divide value and determines the mode of
Stop-Mode Recovery (Figure 34 and Figure 35). All bits
are Write-Only, except bit 7, which is Read-Only. Bit 7 is a
flag bit that is hardware set on the condition of STOP re-
covery and reset by a power-on cycle. Bit 6 controls wheth-
er a low level or a high level is required from the recovery
source. Bit 5 controls the reset delay after recovery. Bits 2,
3, and 4, or the SMR Register, specify the source of the
Stop-Mode Recovery signal. Bits 0 and 1 determine the
time-out period of the WDT. The SMR Register is located
in Bank F of the Expanded Register Group at address
0BH. When the Stop-Mode Recovery sources are selected
in this register, then SMR2 Register bits D0,D1 must be set
to 0.
SCLK/TCLK Divide-by-16 Select (D0).
D0 of the SMR
controls a divide-by-16 prescaler of SCLK/TCLK. The con-
trol selectively reduces device power consumption during
normal processor execution (SCLK control) and/or HALT
mode (where TCLK sources counter/timers and interrupt
logic). This bit is reset to D0 = 0 after a Stop-Mode Recov-
ery, WDT Time-out, and POR.
External Clock Divide-by-Two (D1).
This bit can elimi-
nate the oscillator divide-by-two circuitry. When this bit is
0, the System Clock (SCLK) and Timer Clock (TCLK) are
equal to the external clock HALT Mode frequency divided
by two. The SCLK/TCLK is equal to the external clock fre-
quency when this bit is set (D1=1). Using this bit together
with D7 of PCON further helps lower EMI (that is, D7
(PCON) = 0, D1 (SMR) = 1). The default setting is zero.
Maximum external clock frequency is 8 MHz when SMR
Bit D1 = 1 where SCLK/TCLK = XTAL.
FF
6F
NOP
STOP
; clear the pipeline
; enter STOP Mode
or
; clear the pipeline
; enter HALT Mode
FF
7F
NOP
HALT
Figure 34. Stop-Mode Recovery Register (Write-Only
Except Bit D7, Which Is Read-Only)
D7
D6 D5
D4
D3
D2
D1
D0
SMR (FH) 0B
SCLK/TCLK Divide-by-16
0 OFF* *
1 ON
Stop-Mode Recovery Source
000 POR Only and/or External Reset*
001 Reserved
010 P31
011 P32
100 P33
101 P27
110 P2 NOR 0-3
111 P2 NOR 0-7
Stop Delay
0 OFF
1 ON
Stop Recovery Level
0 Low *
1 High
Stop Flag (Read-Only)
0 POR
1 Stop Recovery
Note: Not used in conjunction with SMR2
Source
* Default Setting After RESET
** Default setting after RESET and
Stop-Mode Recovery
*
*
External Clock Divide-by-2
0 SCLK/TCLK = XTAL/2*
1 SCLK/TCLK = XTAL
Figure 35. Stop-Mode Recovery Register 2
([0F] DH: Write-Only)
Figure 36. SCLK Circuit
D7
D6
D5
D4
D3
D2
D1
D0
SMR2 (0F) DH
Note: Not used in conjunction with SMR Source
Stop-Mode Recovery Source 2
00 POR only*
01 AND P20,P21,P22,P23
10 AND P20,P21,P22,P23,
P24,P25,P26,P27
Reserved (Must be 0)
SMR, D0
÷
2
÷
16
OSC
SCLK
TCLK
SMR, D1
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相關PDF資料 |
PDF描述 |
|---|---|
| Z86E8316SEC | Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A |
| Z86E8316SSC | Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25mA; Package/Case:3-TO-220; Current, It av:10A; Holding Current:35mA |
| Z86E8316VEC | MICROCONTROLLER|8-BIT|Z8 CPU|CMOS|LDCC|28PIN|PLASTIC |
| Z86E8316VSC | MICROCONTROLLER|8-BIT|Z8 CPU|CMOS|LDCC|28PIN|PLASTIC |
| Z86L0308PSC | Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):1A; Gate Trigger Current (QI), Igt:25mA; Package/Case:3-TO-92; Current, It av:1A; Holding Current:25mA |
相關代理商/技術參數 |
參數描述 |
|---|---|
| Z86E8316PSG | 功能描述:8位微控制器 -MCU 4K OTP 16MHz W/ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| Z86E8316SEC | 功能描述:8位微控制器 -MCU 4K OTP 16MHz W/ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| Z86E8316SEC00TR | 功能描述:IC Z8 MCU OTP 4K 28SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:Z8® 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設備:POR，PWM，WDT 輸入/輸出數:40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數據轉換器:A/D 8x10b 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| Z86E8316SEG | 功能描述:8位微控制器 -MCU 4K OTP 16MHz W/ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| Z86E8316SSC | 功能描述:8位微控制器 -MCU 4K OTP 16MHz W/ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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