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參數資料
型號: Z86E8316PSC
英文描述: Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:50mA; Package/Case:3-TO-220; Current, It av:10A; Holding Current:50mA
中文描述: 單片機| 8位| Z8的CPU |的CMOS |雙酯| 28腳|塑料
文件頁數: 41/52頁
文件大小: 483K
代理商: Z86E8316PSC
Z86C83/C84/E83
CMOS Z8
MCU
Zilog
DS97DZ80700
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P R E L I M I N A R Y
8-41
1
Stop-Mode Recovery Source (D2, D3, and D4).
These
three bits of the SMR register specify the wake-up source
of the STOP recovery (Figure 37 and Table 13). When the
Stop-Mode Recovery Sources are selected in this register
then SMR2 register bits D0,D1 must be set to zero. P33-
P31 and Port 2 cannot wake up from STOP Mode if the in-
put lines are configured as analog inputs to the Analog
comparator or Analog-to-Digital Converter.
Note:
If the Port 2 pin is configured as an output, this
output level will be read by the SMR circuitry.
Stop-Mode Recovery Delay Select (D5).
This bit, if High,
enables the T
POR
/RESET delay after Stop-Mode Recov-
ery. The default configuration of this bit is "1". A POR or
WDT reset will override the selection and cause the reset
delay to occur.
Stop-Mode Recovery Edge Select (D6).
A "1" in this bit
position indicates that a high level on the output to the ex-
clusive Or-Gate input from the selected recovery source
wakes the Z86C83/C84/E83 from STOP Mode. A "0" indi-
cates low-level recovery. The default is 0 on POR. This bit
is used for either SMR or SMR2.
Cold or Warm Start (D7).
This bit is set by the device
upon entering STOP Mode. A 0 in this bit (cold) indicates
that the device resets by POR/WDT reset. A "1" in this bit
(warm) indicates that the device awakens by a Stop-Mode
Recovery source.
Note:
A WDT reset out of STOP Mode will also set this bit
to a "1".
Stop-Mode Recovery Register 2 (SMR2).
This register
contains additional Stop-Mode Recovery sources. When
the Stop-Mode Recovery sources are selected in this reg-
ister then SMR Register Bits D2, D3, and D4 must be 0.
Table 13. Stop-Mode Recovery Source
SMR:432
D3
0
0
1
1
0
0
1
1
Operation
D2 Description of Action
0
POR and/or external reset recovery
1
Reserved
0
P31 transition (not in Analog Mode)
1
P32 transition (not in Analog Mode)
0
P33 transition (not in Analog Mode)
1
P27 transition
0
Logical NOR of P20 through P23
1
Logical NOR of P20 through P27
D4
0
0
0
0
1
1
1
1
Table 14. Stop-Mode Recovery Source
SMR:10
D1
0
0
1
Operation
Description of Action
POR and/or external reset recovery
Logical AND of P20 through P23
Logical AND of P20 through P27
D0
0
1
0
Figure 37. Stop-Mode Recovery Source
P31
P32
P33
P27
Stop-Mode Recovery Edge
Select (SMR)
P33 From Pads
Digital/Analog Mode
Select (P3M)
To P33 Data
Latch and IRQ1
To POR
/RESET
0 1 1
MUX
D4 D3 D2
1 1 0
D4 D3 D2
1 1 1
P20
P23
P20
P27
SMR2
SMR2
P20
P23
P20
P27
VDD
SMR2
VDD
SMR D4 D3 D2
0
0 0
D1 D0
1
0
D0
0
1
0
SMR
SMR
D4 D3 D2
1 0 1
SMR 0 1 0
D4 D3 D2
1 0 0
SMR
SMR
相關PDF資料
PDF描述
Z86E8316SEC Triac; Triac Type:Internally Triggered; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25uA; Package/Case:TO-220; Gate Trigger Current Max, Igt:1.5A
Z86E8316SSC Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):10A; Gate Trigger Current (QI), Igt:25mA; Package/Case:3-TO-220; Current, It av:10A; Holding Current:35mA
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Z86E8316VSC MICROCONTROLLER|8-BIT|Z8 CPU|CMOS|LDCC|28PIN|PLASTIC
Z86L0308PSC Triac; Triac Type:Standard; Peak Repetitive Off-State Voltage, Vdrm:200V; On-State RMS Current, IT(rms):1A; Gate Trigger Current (QI), Igt:25mA; Package/Case:3-TO-92; Current, It av:1A; Holding Current:25mA
相關代理商/技術參數
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Z86E8316SEG 功能描述:8位微控制器 -MCU 4K OTP 16MHz W/ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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