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48SD3208

All data sheets are subject to change without notice

2005 Maxwell Technologies

256Mb (8-Meg X 8-Bit X 4-Banks) SDRAM

01.10.05 Rev 2

2. Same bank: The consecutive write command ( the same bank) is illegal.

Read with Auto Precharge to Write command interval

1. Different bank: When some banks are in the active state, the second write command (another bank) is

executed. However, DQM must be set High so that the output buffer becomes High-Z before data input. The

internal auto-precharge of one bank starts at the next clock of the second command.

Read with Auto Precharge to Write Command Interval (Different bank)

2. Same bank: The consecutive write command from read with auto precharge ( the same bank) is illegal. It

is necessary to separate the two commands with a bank active command.

Write with Auto Precharege to Read command interval

1. Different bank: When some banks are in the active state, the second read command (another bank) is

executed. However, in the case of a burst write, data will continue to be written until one clock before the

read command is executed. The internal auto precharge of one bank starts at the next clock of the second

command.

Write with Auto Precharge to Read command Interval (Different bank)

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
48SD3208RPFH	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
48SD3208RPFI	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
48SD3208RPFK	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
48SD6404	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SD6404RPFE	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks

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