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參數(shù)資料

48SD3208

All data sheets are subject to change without notice

2005 Maxwell Technologies

256Mb (8-Meg X 8-Bit X 4-Banks) SDRAM

01.10.05 Rev 2

Recharge command Interval (same bank): To stop output data

CAS Latency = 2, Burst Length = 1, 2, 4, 8

CAS Latency = 3, Burst Length = 1, 2, 4, 8

d to Precharge command interval (same bank): When the precharge command is executed for the same

bank as the write command that preceded it, the minimum interval between the two commands is 1 clock.

However, if the burst write operation is unfinished, the data must be masked by means of DQM for

assurance of the clock defined by t

DPL.

WRITE to PRECHARGE Command Interval (same bank)

Burst Length = 4 (To stop write operation)

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
48SD3208RPFH	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
48SD3208RPFI	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
48SD3208RPFK	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 8-Meg X 8-Bit X 4-Banks
48SD6404	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks
48SD6404RPFE	制造商:MAXWELL 制造商全稱:Maxwell Technologies 功能描述:256 Mb SDRAM 16-Meg X 4-Bit X 4-Banks

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