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參數資料
| 型號： | 71M6533-IGTR/F |
| 廠商： | TERIDIAN SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁數： | 39/124頁 |
| 文件大?。?/td> | 2008K |
| 代理商： | 71M6533-IGTR/F |
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FDS_6533_6534_004
71M6533/71M6534 Data Sheet
v1.1
2007-2009 TERIDIAN Semiconductor Corporation
21
The user switches between pointers by toggling the LSB of the DPS register. The values in the data poin-
ters are not affected by the LSB of the DPS register. All DPTR related instructions use the currently se-
lected DPTR for any activity.
The second data pointer may not be supported by certain compilers.
DPTR1 is useful for copy routines, where it can make the inner loop of the routine two instructions fast-
er compared to the reloading of DPTR from registers. Any interrupt routine using DPTR1 must save
and restore DPS, DPTR and DPTR1, which increases stack usage and slows down interrupt latency.
By selecting the Evatronics R80515 core in the Keil compiler project settings and by using the compiler
directive “MODC2”, dual data pointers are enabled in certain library routines.
An alternative data pointer is available in the form of the PDATA register (SFR 0xBF, sometimes referred
to as USR2). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruc-
tion MOVX A,@Ri or MOVX @Ri,A.
Internal Data Memory Map and Access
The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide. Table 8 shows the internal data memory map.
The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memo-
ry is available only by direct addressing. Indirect addressing of this area accesses the upper 128 bytes of
Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW)
select which bank is in use. The next 16 bytes form a block of bit addressable memory space at ad-
dresses 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect ad-
dressing.
Table 8: Internal Data Memory Map
Address
Direct Addressing
Indirect Addressing
0xFF
Special Function Regis-
ters (SFRs)
RAM
0x80
0x7F
Byte addressable area
0x30
0x2F
Bit addressable area
0x20
0x1F
Register banks R0…R7
0x00
1.3.2
Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 9.
Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read
access to unimplemented addresses will return undefined data, while a write access will have no effect.
SFRs specific to the 71M6533/71M6534 are shown in bold print on a gray field. The registers at 0x80,
0x88, 0x90, etc., are bit addressable, all others are byte addressable.
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| 71M6542F-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 71M6534 | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6534H | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6534H-DB | 功能描述:開發板和工具包 - 8051 71M6534H Demo Brd RoHS:否 制造商:Silicon Labs 產品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 71M6534H-IGT/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6534H-IGTR/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
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