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參數資料
| 型號： | 71M6533-IGTR/F |
| 廠商： | TERIDIAN SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁數： | 93/124頁 |
| 文件大小： | 2008K |
| 代理商： | 71M6533-IGTR/F |
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71M6533/71M6534 Data Sheet
FDS_6533_6534_004
70
2007-2009 TERIDIAN Semiconductor Corporation
v1.1
3.10 Optical Interface (UART1)
The OPT_TX and OPT_RX pins can be used for a regular serial interface (by connecting a RS_232 tran-
sceiver for example), or they can be used to directly operate optical components (for example, an infrared
diode and phototransistor implementing a FLAG interface). Figure 37 shows the basic connections for
UART1. The OPT_TX pin becomes active when the I/O RAM register OPT_TXE is set to 00.
The polarity of the OPT_TX and OPT_RX pins can be inverted with the configuration bits, OPT_TXINV
and OPT_RXINV, respectively.
The OPT_TX output may be modulated at 38 kHz when system power is present. Modulation is not
available in BROWNOUT mode. The OPT_TXMOD bit enables modulation. The duty cycle is controlled
by OPT_FDC[1:0], which can select 50%, 25%, 12.5%, and 6.25% duty cycle. A 6.25% duty cycle means
OPT_TX is low for 6.25% of the period. The OPT_RX pin uses digital signal thresholds. It may need an
analog filter when receiving modulated optical signals.
With modulation, an optical emitter can be operated at higher current than nominal, enabling it to
increase the distance along the optical path.
If operation in BROWNOUT mode is desired, the external components should be connected to V3P3D.
Figure 37: Connection for Optical Components
3.11 Connecting the V1 Pin
A voltage divider should be used to establish that V1 is in a safe range when the meter is in MISSION
mode (see Figure 38). V1 must be lower than 2.9 V in all cases in order to keep the hardware watchdog
timer enabled. The resistor divider ratio must be chosen so that V1 crosses the VBIAS threshold when
V3P3 is near the minimum supply voltage (3.0 VDC). A series resistor (R3) provides additional hystere-
sis, and a capacitor to ground (C1) is added for enhanced EMC immunity.
The amount of hysteresis depends on the choice of R1 and R3: If V1 < VBIAS, approximately 1 A will
flow into the on-chip V1 comparator causing a voltage drop. If V1
≥ VBIAS, almost no current will flow
into the comparator. The voltage drop will require V3P3 to be slightly higher for V1 to cross the VBIAS
threshold when V3P3 is rising as compared to when V3P3 is falling. Maintaining sufficient hysteresis
helps to eliminate rapid mode changes which may occur in cases where the power supply is unstable with
V1 close to the VBIAS threshold point.
OPT_TX
R
2
R
1
OPT_RX
71M6533/71M6534
V3P3SYS
Phototransistor
LED
10 k
100 pF
V3P3SYS
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| 71M6534H-DB | 功能描述:開發板和工具包 - 8051 71M6534H Demo Brd RoHS:否 制造商:Silicon Labs 產品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 71M6534H-IGT/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6534H-IGTR/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
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