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參數資料
| 型號： | 71M6533-IGTR/F |
| 廠商： | TERIDIAN SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁數： | 64/124頁 |
| 文件大小： | 2008K |
| 代理商： | 71M6533-IGTR/F |
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71M6533/71M6534 Data Sheet
FDS_6533_6534_004
44
2007-2009 TERIDIAN Semiconductor Corporation
v1.1
DIO
48
49
50
51
52* 53* 54* 55*
56
57
58
LCD Segment
68
69
70
71
72* 73* 74* 75*
–
71M6533 Pin #
23
24
25
50
–
14
15
16
71M6534 Pin #
28
29
30
56
57
58
59
60
19
20
21
Configuration (DIO
or LCD segment)
4
5
6
7
0*
1*
2*
3*
Always DIO
LCD_BITMAP[71:64] LCD_BITMAP[80:72]
Data Register
L
C
D_S
E
G68[
0]
L
C
D_S
E
G69[
0]
L
C
D_S
E
G70[
0]
L
C
D_S
E
G71[
0]
L
C
D
_
S
E
G
7
2
[0
]*
L
C
D
_
S
E
G
7
3
[0
]*
L
C
D
_
S
E
G
7
4
[0
]*
L
C
D
_
S
E
G
7
5
[0
]*
D
IO
_
5
6
[4
]
D
IO
_
5
7
[4
]
D
IO
_
5
8
[4
]
Direction Register
0 = input, 1 = output
L
C
D_S
E
G68[
3]
L
C
D_S
E
G69[
3]
L
C
D_S
E
G70[
3]
L
C
D_S
E
G71[
3]
L
C
D_S
E
G72[
3
]*
L
C
D_S
E
G73[
3
]*
L
C
D_S
E
G74[
3
]*
L
C
D_S
E
G75[
3
]*
D
IO
_
D
IR
5
6
[7
]
D
IO
_
D
IR
5
7
[7
]
D
IO
_
D
IR
5
8
[7
]
See the tables in the I/O RAM Description (Section 4.2) for exact bit locations. For example,
DIO43 is controlled by LCD_SEG63[0] which resolves to I/O RAM location 0x2045[4].
DIO24 and higher do not have SFR registers for direction control. DIO36 and higher do not have SFR
registers for data access. The direction control of these pins is achieved with the LCD_SEGn[3] registers
and data access is controlled with the LCD_SEGn[0] registers in I/O RAM. DIO56 through DIO58 are ded-
icated DIO pins. They are controlled with DIO_DIR56[7] through DIO_DIR58[7] (direction) and with
DIO_56[4] through DIO_58[4] (data) in I/O RAM.
Since the control for DIO_24 through DIO_55 is shared with the control for LCD segments, the firmware
must take care not to disturb the DIO pins when accessing the LCD segments and vice versa. Usually,
this requires reading the I/O RAM register, applying a mask and writing back the modified byte.
The PB pin is a dedicated digital input. In addition, if the optical UART is not used, OPT_TX and OPT_RX can
be configured as dedicated DIO pins, DIO1and DIO2, respectively (see Section 1.4.6 UART and Optical Inter-
DIO4 and DIO5 can be configured to implement the EEPROM Interface.
Additionally, if DIO6 and DIO7 are configured as DIO and defined as outputs, they can be used as dedicat-
ed pulse outputs (WPULSE = DIO6, VARPULSE = DIO7) using the DIO_PW and DIO_PV registers. In this
case, DIO6 and DIO7 are under CE control. Similarly, DIO8 and DIO9 can be declared pulse outputs
(XPULSE = DIO8, YPULSE = DIO9).
Tracking DIO pins configured as outputs is useful for pulse counting without external hardware.
Either the interrupts or the counter/timer clocks can be used to count the pulse outputs, or inter-
rupt on the CE’s power failure output.
A 3-bit configuration word, I/O RAM register DIO_Rn (0x2009[2:0] through 0x200E[6:4]) can be used for
certain pins (when configured as DIO) to individually assign an internal resource such as an interrupt or a
timer control (DIO_RRX configures the RX pin). This way, DIO pins can be tracked even if they are confi-
gured as outputs. See Table 39 for DIO pins available for this option. Table 40 lists the internal re-
sources which can be assigned using DIO_R0 (also called DIO_RPB) through DIO_R7. If more than one
input is connected to the same resource, the resources are combined using a logical OR.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 71M6534 | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6534H | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6534H-DB | 功能描述:開發板和工具包 - 8051 71M6534H Demo Brd RoHS:否 制造商:Silicon Labs 產品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 71M6534H-IGT/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6534H-IGTR/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
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