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| 型號： | 73M1903C-IMR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | LEAD FREE, QFN-32 |
| 文件頁數(shù)： | 38/48頁 |
| 文件大小： | 487K |
| 代理商： | 73M1903C-IMR/F |
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DS_1903C_033
73M1903C Data Sheet
Rev. 5.0
43
Exam ple 2: Fxtal = 18.432 MHz, Fref = 2.304 MHz.
Pdvsr = Integer [Fxtal/Fref] = 8 = 8h;
Prst[2:0] = 1- 1 = 0 from Fref/Fxtal = 18.432/2.304 = 8/1;
Pseq = {x,x,x,x,x,x,x,x} = xxh
Example 3: Fxtal = 24.576 MHz, Fref = 2.4576 MHz.
Pdvsr = Integer [ Fxtal/Fref] = 10 = Ah;
Prst[2:0] = 1- 1 = 0 from Fref/Fxtal = 24.576/2.4576 = 10/1;
Pseq = {x,x,x,x,x,x,x,x} = xxh
Example 4: Fxtal = 24.576 MHz, Fref = 3.072 MHz.
Pdvsr = Integer [ Fxtal/Fref] = 8 = 8h;
Prst[2:0] = 1- 1 = 0 from Fref/Fxtal = 24.576/3.072 = 8/1;
Pseq = {x,x,x,x,x,x,x,x} = xxh
It is also important to note that when Fxtal/Fref is an integer the output of the prescaler is a straight
frequency divider (example 2). As such there will be no jitter generated at Fref. However if Fxtal/Fref is
a fractional number, Fref, at the output of the prescaler NCO would be exact only in an average sense
(example 1) and there will be a certain amount of fixed pattern (repeating) jitter associated with Fref which
can be filtered out by the PLL that follows by appropriately programming the PLL. It is important to note,
however, that the fixed pattern jitter does not degrade the performance of the sigma delta modulators so
long as its frequency is >> 4 kHz.
PLL
VCO
Kvco
NCO
Prescaler
PFD
Charge
Pump
NCO
Kd
Up
Dn
R1
C1
C2
Divide
by 2/1
Ichp Control
3
Fref
Kvco Control
Figure 21: PLL Block Diagram
73M1903C has a built in PLL circuit to allow an operation over wide range of Fs. It is of a conventional
design with the exception of an NCO based feedback divider. See Figure 19.
The architecture of the 73M1903C dictates that the PLL output frequency, Fvco, be related to the
sampling rate, Fs, by Fvco = 2 x 2304 x Fs. The NCO must function as a divider whose divide ratio
equals Fref/Fvco.
Just as in the NCO prescaler, a set of three numbers– Ndvsr ( 7 bits ), Nrst ( 3 bits ) and Nseq ( 8 bits )
must be entered thru a serial port to affect this divide:
Ndvsr = Integer [Fref/Fxtal] ;
Nrst = Denominator of the ratio (Fvco/Fref), Dnco1, minus 1, when it is expressed as a ratio of two
smallest integers = Nnco1/Dnco1;
Nseq = Divide Sequence
Example 1: Fs = 7.2 kHz or Fvco = 2 x 2304 x 7.2 kHz = 33.1776 MHz, Fref = 1.728 MHz.
Ndvsr = Integer [ Fvco/Fref ] = 19
Nrst = 5 – 1 = 4 from Fvco/Fref = 19.2 = 96/5;
Nseq =
÷19, ÷19, ÷19, ÷19, ÷20 => {0,0,0,0,1} = xxx00001 = 01h.
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