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參數資料
| 型號： | 9214DGLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9214 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.173 INCH, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-28 |
| 文件頁數： | 6/18頁 |
| 文件大小： | 310K |
| 代理商： | 9214DGLF-T |
14
Integrated
Circuit
Systems, Inc.
ICS9214
0809E—11/17/06
Sample points are for this equation are shown in Table 6. Phase Noise Data Points
Phase Noise
Table 6 : Phase Noise Data Points
The 9214 meets the single side band phase noise spectral purity for offset frequencies between 1 MHz and 100 MHz as
described by the equation:
10log[1+(50 x 106/f)2.4] -138 dBc/Hz
This equation is shown in Figure 9. Phase Noise Plot
Figure 9 : Phase Noise Plot
1
5
10
15
20
40
80
100
-97
-114
-121
-125.2
-
-133.7
-136.8
-137.3
Offset
Frequency
(MHz)
SSB Spectral
Purity
(dbc/Hz)
128
-1 50
-1 40
-1 30
-1 20
-1 10
-1 00
67
8
9
10
1 0
10
Offs e t Fre q u e ncy f , H z
SS
B
Sp
e
c
tr
a
l
Pu
ri
ty
L
(f)
d
B
c
/H
z
10 lo g[1 + ( 5 0 x 1 0
6/ f )2.4] -138
( U p p er L im it )
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