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參數資料
| 型號： | 935261222557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, SOT-319, QFP-64 |
| 文件頁數： | 3/36頁 |
| 文件大小： | 203K |
| 代理商： | 935261222557 |
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1999 Jun 14
11
Philips Semiconductors
Preliminary specication
ATSC 8-VSB demodulator and decoder
TDA8960
DAC interface
The TDA8960 D/A interface connects to an external off-chip serial D/A converter. It supports four different serial modes.
EXTERNAL INTERFACE
The DAC interface consists of pins 61 to 64; see Table 2.
Table 2
DAC interface
OUTPUT MODES
Table 3 shows which DACs can be used in the different output modes.
Table 3
DAC serial interface modes and DAC types
The operating mode is programmed by means of the I2C-bus interface. Bits 4 and 5 of registers 09H control the mode;
see Table 13.
The timing diagrams of the different serial modes are shown in Fig.4. Modes 0 and 3 do not use the load signal available
at pin TRLD. In mode 3 the output of the timing recovery low-pass filter is inverted to control VCXOs which have a
negative dF/dV. Modes 0 and 3 can provide up to 67 ns of the serial data set-up time from the moment the TRSDO output
has a new data bit until the start of the TRSTB pulse.
In mode 1 the TRCS pin is not used.
PIN
FUNCTION
TRSDO
serial data output
TRSTB
strobe signal which can be used by the DAC to shift in serial data
TRCS
chip select signal for DAC is also used by some DACs to load serially shifted data in the internal
parallel register on the positive edge
TRLD
load signal used by some DACs to load serially shifted data in the internal parallel latches
OUTPUT MODE
POLARITY
SET-UP TIME (ns)
EXAMPLE DEVICE
0
+dF/dV
67
Maxim
MAX531, MAX538, MAX539, MAX504 and MAX515
Texas Instruments TLC5615
Sipex SP9500 and SP960
Linear Technology TLC1451
1
+dF/dV
45
Analog Devices AD7943
2
+dF/dV
45
Analog Devices DAC8512
3
dF/dV
67
same types as mode 0
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