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參數資料
| 型號： | 935261790112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 封裝： | 5.30 MM, PLASTIC, SSOP-28 |
| 文件頁數： | 10/31頁 |
| 文件大?。?/td> | 199K |
| 代理商： | 935261790112 |
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2000 Feb 04
18
Philips Semiconductors
Preliminary specication
Low-voltage low-power stereo audio
CODEC with DSP features
UDA1344TS
AC CHARACTERISTICS
VDDD =VDDA =VDDO = 3.0 V; fi = 1 kHz; Tamb =25 °C; RL =5k; all voltages referenced to ground; unless otherwise
specied.
Notes
1. The input voltage can be up to 2 V (RMS) when the current through the ADC input pin is limited to approximately
1 mA by using a series resistor.
2. The input voltage to the ADC is inversely proportional with the supply voltage.
3. The output voltage of the UDA1344TS differs from the output voltage of the UDA1340M.
4. The output of the DAC scales proportionally with the supply voltage.
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
Analog-to-digital converter
Vi(rms)
input voltage (RMS value)
notes 1 and 2
1.0
V
i
unbalance between channels
0.1
dB
(THD + N)/S
total harmonic distortion-plus-noise to signal ratio at 0 dB
85
80
dB
at
60 dB; A-weighted
35
30
dB
S/N
signal-to-noise ratio
Vi = 0 V; A-weighted
95
dB
αcs
channel separation
100
dB
PSRR
power supply rejection ratio
fripple = 1 kHz;
Vripple = 300 mV (p-p)
30
dB
Digital-to-analog converter
Vo(rms)
output voltage (RMS value)
notes 3 and 4
900
mV
V
o
unbalance between channels
0.1
dB
(THD + N)/S
total harmonic distortion-plus-noise to signal ratio at 0 dB
90
85
dB
at
60 dB; A-weighted
37
dB
S/N
signal-to-noise ratio
code = 0; A-weighted
100
dB
α
cs
channel separation
100
dB
PSRR
power supply rejection ratio
fripple = 1 kHz;
Vripple = 300 mV (p-p)
50
dB
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