
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 19: Memory Based Scaler
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
19-35
15:11
Reserved
-
10:0
BBD_FIRST_VID_LINE
2 [10:0]
R
Number of rst video line detected (second detector)
Black Level Detection Registers
Offset 0x10 CE40
Black Level Detection Control
31:1
Reserved
-
0
FILT1_ENABLE
W
1
Enable / Disable the use of lter1
0 = disable
1 = enable
Offset 0x10 CE48
Black Level Detection Window Start
31:27
Reserved
-
26:16
BLD_XWS [10:0]
W
1
Horizontal black level detection window start
15:11
Reserved
-
10:0
BLD_YWS [10:0]
W
1
Vertical black level detection window start
Offset 0x10 CE4C
Black Level Detection Window End
31:27
Reserved
-
26:16
BLD_XWE [10:0]
W
2D0
Horizontal black level detection window end. Pixels from XWS up to
and including XWE are processed.
15:11
Reserved
-
10:0
BLD_YWE [10:0]
W
120
Vertical black level detection window end. Lines from YWS up to
and including YWE are processed.
Offset 0x10 CEC0
Black Level Detection Control / Output
8:0
SMARTBLACK [8:0]
R
Minimum luminance level
UV Bandwidth Detection Registers
Offset 0x10 CE50
Bandwidth Detection Control
31:9
Reserved
-
8:0
MAX_DELTA_BW [8:0]
W
1FF
Slope of the rectier:
0: no slope
511: maximum slope (default)
Offset 0x10 CE58
Bandwidth Detection Window Start
31:27
Reserved
-
26:16
BWD_XWS [10:0]
W
1
Horizontal bandwidth detection window start
15:11
Reserved
-
10:0
BWD_YWS [10:0]
W
1
Vertical bandwidth detection window start
Offset 0x10 CE5C
Bandwidth Detection Window End
31:27
Reserved
-
26:16
BWD_XWE [10:0]
W
2D0
Horizontal bandwidth detection window end
15:11
Reserved
-
10:0
BWD_YWE [10:0]
W
120
Vertical bandwidth detection window end
Table 8: Memory Based Scaler (MBS) Registers …Continued
Bit
Symbol
Acces
s
Value
Description