- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25527 > 95V857AHLFT (INTEGRATED DEVICE TECHNOLOGY INC) 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56 PDF資料下載
參數(shù)資料
| 型號： | 95V857AHLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56 |
| 封裝： | LEAD FREE, MO-205, MO-225, BGA-56 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 129K |
| 代理商： | 95V857AHLFT |
Integrated
Circuit
Systems, Inc.
ICS95V857
0674U—01/27/09
Block Diagram
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Pin Configuration
48-Pin TSSOP/TVSOP
Recommended Application:
DDR Memory Modules / Zero Delay Board Fan Out
Provides complete DDR registered DIMM solution
with ICSSSTVF16857, ICSSSTVF16859 or
ICSSSTV32852
Product Description/Features:
Low skew, low jitter PLL clock driver
1 to 10 differential clock distribution (SSTL_2)
Feedback pins for input to output synchronization
PD# for power management
Spread Spectrum-tolerant inputs
Auto PD when input signal removed
Specifications:
Meets PC3200 Class A+ specification for DDR-I 400
support
Covers all DDRI speed grades
Switching Characteristics:
CYCLE - CYCLE jitter: <50ps
OUTPUT - OUTPUT skew: <40ps
Period jitter: ±30ps
S
T
U
P
N
IS
T
U
P
T
U
O
e
t
a
t
S
L
P
D
V
A#
D
PT
N
I
_
K
L
CC
N
I
_
K
L
CT
K
L
CC
K
L
CT
T
U
O
_
B
FC
T
U
O
_
B
F
D
N
GH
L
H
L
H
L
H
f
o
/
d
e
s
a
p
y
B
D
N
GH
H
L
H
L
H
L
f
o
/
d
e
s
a
p
y
B
V
5
.
2
)
m
o
n
(
LL
H
Z
f
o
V
5
.
2
)
m
o
n
(
LH
LZ
Z
f
o
V
5
.
2
)
m
o
n
(
HL
H
L
H
n
o
V
5
.
2
)
m
o
n
(
HH
L
H
L
H
L
n
o
V
5
.
2
)
m
o
n
(
X)
z
H
M
0
2
<
)
1
(
ZZ
Z
f
o
Functionality
PLL
FB_INT
FB_INC
CLK_INC
CLK_INT
PD#
Control
Logic
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKT5
CLKT6
CLKT7
CLKT8
CLKT9
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
CLKC5
CLKC6
CLKC7
CLKC8
CLKC9
6.10 mm Body, 0.50 mm Pitch = TSSOP
4.40 mm Body, 0.40 mm Pitch = TVSOP
GND
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
CLKC2
CLKT2
VDD
CLK_INT
CLK_INC
VDD
AVDD
AGND
GND
CLKC3
CLKT3
VDD
CLKT4
CLKC4
GND
CLKC5
CLKT5
VDD
CLKT6
CLKC6
GND
CLKC7
CLKT7
VDD
PD#
FB_INT
FB_INC
VDD
FB_OUTC
FB_OUTT
GND
CLKC8
CLKT8
VDD
CLKT9
CLKC9
GND
ICS95V857
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 95V857CGLF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 95V857CGLF8 | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 95V857CGLF | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 95VLP857AHLF-T | PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56 |
| 95VLP857AKLF-T | PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 95V857AKLF | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V857AKLF/W | 制造商:Integrated Device Technology Inc 功能描述:NON-JEDEC PIN 1 ORIENTATION - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:IC PLL CLK DRVR 2.5V 40MLF |
| 95V857AKLFT | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V857ALLF | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V857ALLFT | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。