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參數(shù)資料
型號(hào): 9763-11
廠商: PEREGRINE SEMICONDUCTOR CORP
元件分類: PLL合成/DDS/VCOs
英文描述: 3.2 GHz Delta-Sigma modulated Fractional-N Frequency Synthesizer for Low Phase Noise Applications
中文描述: PLL FREQUENCY SYNTHESIZER, CQCC68
封裝: CERAMIC, QFJ-68
文件頁數(shù): 1/15頁
文件大小: 351K
代理商: 9763-11
Page 1 of 15
Document No. 70-0140-02
│ www.psemi.com
2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Peregrine’s PE9763 is a high performance fractional-N PLL
capable of frequency synthesis up to 3.2 GHz. The device is
designed for superior phase noise performance while providing
an order of magnitude reduction in current consumption, when
compared with the existing commercial space PLLs.
The PE9763 features a 10/11 dual modulus prescaler,
counters, a delta sigma modulator, a phase comparator and a
charge pump as shown in Figure 1. Counter values are
programmable through either a serial interface or directly hard-
wired.
PE9763 is optimized for commercial space applications. Single
Event Latch up (SEL) is physically impossible and Single Event
Upset (SEU) is better than 10-9 errors per bit / day. Fabricated
in Peregrine’s patented UTSi (Ultra Thin Silicon) CMOS
technology, the PE9763 offers excellent RF performance and
intrinsic radiation tolerance.
Product Specification
3.2 GHz Delta-Sigma modulated
Fractional-N Frequency Synthesizer
for Low Phase Noise Applications
Product Description
Figure 1. Block Diagram
PE9763
Features
3.2 GHz operation
÷10/11 dual modulus prescaler
Selectable phase detector or charge
pump output
Serial or Direct mode access
Frequency selectivity: Comparison
frequency / 218
Low power —- 25 - 30 mA at 3V (phase
detector / charge pump)
Rad-Hard
Ultra-low phase noise
68-lead CQFJ or Die
Auxilia-
ry
20-bit
Latch
F
in
F
in
Prescaler
10/11
Main
Counter
20
Secon-
dary
20-bit
Latch
Primary
21-bit
Latch
R Counter
f
r
Phase
Detector
6
13
Sdata
PD_U
PD_D
DSM
4
Charge
Pump
CP
2
18
13
+
19
20
18
K
17:0
M
8:0
A
3:0
R
5:0
Pre_en
Direct
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