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參數資料
| 型號： | AD7713AN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Loop-Powered Signal Conditioning ADC |
| 中文描述： | 3-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-24 |
| 文件頁數： | 9/28頁 |
| 文件大小： | 516K |
| 代理商： | AD7713AN |
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2
–9–
REV. C
AD7713
CONTROL REGISTER (24 BITS)
A write to the device with the A0 input low writes data to the control register. A read to the device with the A0 input low accesses the
contents of the control register. The control register is 24 bits wide and when writing to the register 24 bits of data must be written
otherwise the data will not be loaded to the control register. In other words, it is not possible to write just the first 12 bits of data into
the control register. If more than 24 clock pulses are provided before
TFS
returns high, then all clock pulses after the 24th clock
pulse are ignored. Similarly, a read operation from the control register should access 24 bits of data.
MSB
MD2
MD1
MD0
G2
G1
G0
CH1
CH0
WL
RO
BO
B/U
FS11
FS10
FS9
FS8
FS7
FS6
FS5
FS4
FS3
FS2
FS1
FS0
LSB
Operating Mode
MD2
MD1
MD0
Operating Mode
0
0
0
Normal Mode. This is the normal mode of operation of the device whereby a read to the device with A0
high accesses data from the data register. This is the default condition of these bits after the internal
power-on reset.
Activate Self-Calibration. This activates self-calibration on the channel selected by CH0 and CH1. This
is a one-step calibration sequence, and when complete, the part returns to Normal Mode (with MD2,
MD1, MD0 of the control registers returning to 0, 0, 0). The
DRDY
output indicates when this self-
calibration is complete. For this calibration type, the zero-scale calibration is done internally on shorted
(zeroed) inputs and the full-scale calibration is done on V
REF
.
Activate System Calibration. This activates system calibration on the channel selected by CH0 and CH1.
This is a two-step calibration sequence, with the zero-scale calibration done first on the selected input
channel and
DRDY
indicating when this zero-scale calibration is complete. The part returns to Normal
Mode at the end of this first step in the two-step sequence.
Activate System Calibration. This is the second step of the system calibration sequence with full-scale
calibration being performed on the selected input channel. Once again,
DRDY
indicates when the full-
scale calibration is complete. When this calibration is complete, the part returns to Normal Mode.
Activate System Offset Calibration. This activates system offset calibration on the channel selected by
CH0 and CH1. This is a one-step calibration sequence and, when complete, the part returns to Normal
Mode with
DRDY
indicating when this system offset calibration is complete. For this calibration type,
the zero-scale calibration is done on the selected input channel and the full-scale calibration is done
internally on V
REF
.
Activate Background Calibration. This activates background calibration on the channel selected by CH0
and CH1. If the background calibration mode is on, then the AD7713 provides continuous self-
calibration of the reference and shorted (zeroed) inputs. This calibration takes place as part of the con-
version sequence, extending the conversion time and reducing the word rate by a factor of six. Its major
advantage is that the user does not have to worry about recalibrating the device when there is a change
in the ambient temperature. In this mode, the shorted (zeroed) inputs and V
REF
, as well as the analog
input voltage, are continuously monitored and the calibration registers of the device are updated.
Read/Write Zero-Scale Calibration Coefficients. A read to the device with A0 high accesses the contents
of the zero-scale calibration coefficients of the channel selected by CH0 and CH1. A write to the device
with A0 high writes data to the zero-scale calibration coefficients of the channel selected by CH0 and
CH1. The word length for reading and writing these coefficients is 24 bits, regardless of the status of the
WL bit of the control register. Therefore, when writing to the calibration register, 24 bits of data must be
written, otherwise the new data will not be transferred to the calibration register.
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Read/Write Full-Scale Calibration Coefficients. A read to the device with A0 high accesses the contents of
the full-scale calibration coefficients of the channel selected by CH0 and CH1. A write to the device
with A0 high writes data to the full-scale calibration coefficients of the channel selected by CH0 and
CH1. The word length for reading and writing these coefficients is 24 bits, regardless of the status of the
WL bit of the control register. Therefore, when writing to the calibration register, 24 bits of data must be
written, otherwise the new data will not be transferred to the calibration register.
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相關代理商/技術參數 |
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| AD7713ANZ | 功能描述:IC ADC 24BIT SIGMA-DELTA 24-DIP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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| AD7713AR | 功能描述:IC ADC SIGNAL COND LC2MOS 24SOIC RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數:12 采樣率（每秒）:3M 數據接口:- 轉換器數目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數目和類型:- |
| AD7713AR-REEL | 制造商:Analog Devices 功能描述:24-BIT SIGMA DELTA ADC IC - Tape and Reel |
| AD7713AR-REEL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Loop-Powered Signal Conditioning ADC |
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