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參數資料
| 型號： | AD7719 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | Low Voltage, Low Power, Factory-Calibrated 16-/24-Bit Dual ADC |
| 中文描述： | 低電壓，低功耗，工廠校準，16-/24-Bit雙ADC |
| 文件頁數： | 25/40頁 |
| 文件大?。?/td> | 367K |
| 代理商： | AD7719 |
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REV. 0
AD7719
–25–
Table XVI. IOCON (I/O and Current Source Control Register) Bit Designations
Bit
Location
Bit
Name
Description
IOCON15
PSW2
Power Switch 2 Control Bit.
Set
by user to enable Power switch P2 to PWRGND.
Cleared
by user to enable use as a standard I/O pin.
When the ADC is in standby mode the power switches are open.
Power Switch 1 Control Bit.
Set
by user to enable Power switch P1 to PWRGND.
Cleared
by user to enable use as a standard I/O pin.
When ADC is in standby mode the power switches are open.
This bit must be zero for correct operation.
Burnout Current Enable Bit.
Set
by user to enable the 100 nA current sources in the Main ADC signal path. A 100 nA current
source is applied to the positive input leg while a 100 nA sink is applied to the negative input.
Cleared
by user to disable both transducer burnout current sources.
IEXE2, 200
μ
A Current Source Direction Bit.
Set
by user to enable IEXC2 current source to IOUT1.
Cleared
by user to enable IEXC2 current source to IOUT2.
IEXE1, 200
μ
A Current Source Direction Bit.
Set
by user to enable IEXC1 current source to IOUT2.
Cleared
by user to enable IEXC1 current source to IOUT1.
IEXC2 Current Source Enable Bit.
Set
by user to turn on the IEXC2 excitation current source.
Cleared
by user to turn off the IEXC2 excitation current source.
IEXC1 Current Source Enable Bit.
Set
by user to turn on the IEXC1 excitation current source.
Cleared
by user to turn off the IEXC1 excitation current source.
P4, I/O Direction Control Bit.
Set
by user to enable P4 as an output.
Cleared
by user to enable P4 as an input. There are weak active pull-ups internally when enabled
as an input.
P3, I/O Direction Control Bit.
Set
by user to enable P3 as an output.
Cleared
by user to enable P3 as an input. There are weak active pull-ups internally when enabled
as an input.
P2 Digital Output Enable Bit.
Set
by user to enable P2 as a regular digital output pin.
Cleared
by user to three-state P2 output.
PSW2 takes precedence over P2EN.
P1 Digital Output Enable Bit.
Set
by user to enable P1 as a regular digital output pin.
Cleared
by user to three-state P1 output.
PSW1 takes precedence over P1EN.
Digital I/O Port Data Bits.
IOCON14
PSW1
IOCON13
IOCON12
0
BO
IOCON11
I2PIN
IOCON10
I1PIN
IOCON9
I2EN
IOCON8
I1EN
IOCON7
P4DIR
IOCON6
P3DIR
IOCON5
P2EN
IOCON4
P1EN
IOCON3
IOCON2
IOCON1
IOCON0
P4DAT
P3DAT
P2DAT
P1DAT
The readback value of these bits indicate the status of their respective pin when the I/O port is
active as an input.
The values written to these data bits appear at the output port when the I/O bits are enabled as
outputs.
P2 and P1 are outputs only, so reading P2DAT and P1DAT will return what was last written to
these bits.
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