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參數資料
型號: AD7732BRU
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 2-Channel, +-10 V Input Range, High Throughput, 24-Bit SIGMA- ADC
中文描述: 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝: MO-153AE, TSSOP-28
文件頁數: 10/32頁
文件大小: 1576K
代理商: AD7732BRU
AD7732
OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7732 can be operated with chopping enabled or
disabled, allowing the ADC to be programmed to either
optimize the throughput rate and channel switching time or to
optimize the offset drift performance. Noise tables for these two
primary modes of operation are outlined below for a selection
of output rates and settling times.
Rev. 0 | Page 10 of 32
The AD7732 noise performance depends on the selected
chopping mode, the filter word (FW) value, and the selected
analog input range. The AD7732 noise will not vary
significantly with MCLK frequency.
Chopping Enabled
The first mode, in which the AD7732 is configured with
chopping enabled (CHOP = 1), provides very low noise with
lower output rates. Table 4 to Table 6 show the –3 dB
frequencies and typical performance versus the channel
conversion time and equivalent output data rate, respectively.
shows the typical output rms noise. Table 5 shows the typical
effective resolution based on rms noise. Table 6 shows the
typical output peak-to-peak resolution, representing values for
which there will be no code flicker within a 6-sigma limit. The
peak-to-peak resolutions are not calculated based on rms noise
but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
Table 4. Typical Output RMS Noise in μV vs. Conversion Time and Input Range with Chopping Enabled
FW
Conversion Time
Register
(μs)
(Hz)
Conversion Time
Output Data Rate
–3 dB Frequency
(Hz)
RMS Noise
(μV)
127
46
22
17
FFh
AEh
96h
91h
88h
86h
82h
2686
999
499
395
207
166
82
372
1001
2005
2534
4826
6041
12166
200
520
1040
1300
2500
3100
6300
9.6
15.5
22.7
26.1
39.2
46.0
120.0
8
6
2
Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
FW
Conversion Time
Register
(μs)
(Hz)
Input Range/Effective Resolution (Bits)
±10 V
0 V to +10 V
21.0
20.0
20.3
19.3
19.7
18.7
19.5
18.5
19.0
18.0
18.7
17.7
17.3
16.3
Conversion Time
Output Data Rate
–3 dB Frequency
(Hz)
±5 V
20.0
19.3
18.7
18.5
18.0
17.7
16.3
0 V to +5 V
19.0
18.3
17.7
17.5
17.0
16.7
15.3
127
46
22
17
FFh
AEh
96h
91h
88h
86h
82h
2686
999
499
395
207
166
82
372
1001
2005
2534
4826
6041
12166
200
520
1040
1300
2500
3100
6300
8
6
2
Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
FW
Conversion Time
Register
(μs)
(Hz)
Input Range/Peak-to-Peak Resolution (Bits)
Conversion Time
Output Data Rate
–3 dB Frequency
(Hz)
±10 V
18.1
17.4
16.9
16.7
16.2
15.8
15.0
0 V to +10 V
17.1
16.4
15.9
15.7
15.2
14.8
13.4
±5 V
17.1
16.4
15.9
15.7
15.2
14.8
13.4
0 V to +5 V
16.1
15.4
14.9
14.7
14.2
13.8
12.4
127
46
22
17
FFh
AEh
96h
91h
88h
86h
82h
2686
999
499
395
207
166
82
372
1001
2005
2534
4826
6041
12166
200
520
1040
1300
2500
3100
6300
8
6
2
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