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參數資料
型號: AD7755AAN-REF
廠商: Analog Devices, Inc.
英文描述: GT 7C 7#8 SKT RECP
中文描述: 電能計量IC輸出脈沖
文件頁數: 14/16頁
文件大?。?/td> 250K
代理商: AD7755AAN-REF
REV. B
AD7755
–14–
Interfacing the AD7755 to a Microcontroller for Energy
Measurement
The easiest way to interface the AD7755 to a microcontroller is
to use the CF high frequency output with the output frequency
scaling set to 2048
×
F1, F2. This is done by setting SCF = 0
and S0 = S1 = 1, see Table IV. With full-scale ac signals on the
analog inputs, the output frequency on CF will be approximately
5.5 kHz. Figure 31 illustrates one scheme which could be used
to digitize the output frequency and carry out the necessary
averaging mentioned in the previous section.
TIME
10%
AVERAGE
FREQUENCY
CF
FREQUENCY
RIPPLE
MCU
UP/
DOWN
COUNTER
TIMER
CF
REVP
*
AD7755
*
REVP MUST BE USED IF THE METER IS BIDIRECTIONAL OR
DIRECTION OF ENERGY FLOW IS NEEDED
Figure 31. Interfacing the AD7755 to an MCU
As shown, the frequency output CF is connected to an MCU
counter or port. This will count the number of pulses in a given
integration time which is determined by an MCU internal timer.
The average power is proportional to the average frequency is
given by:
Average Frequency
Average
al Power
Re
Counter
Timer
=
=
The energy consumed during an integration period is given by:
For the purpose of calibration, this integration time could be 10
to 20 seconds in order to accumulate enough pulses to ensure
correct averaging of the frequency. In normal operation the inte-
gration time could be reduced to one or two seconds depending,
for example, on the required undate rate of a display. With
shorter integration times on the MCU the amount of energy in
each update may still have some small amount of ripple, even
under steady load conditions. However, over a minute or more
the measured energy will have no ripple.
Energy
Average Power
Time
Counter
Time
Time
Counter
=
×
=
×
=
Power Measurement Considerations
Calculating and displaying power information will always have
some associated ripple that will depend on the integration period
used in the MCU to determine average power and also the load.
For example, at light loads the output frequency may be 10Hz.
With an integration period of two seconds, only about 20 pulses
will be counted. The possibility of missing one pulse always exists
as the AD7755 output frequency is running asynchronously to
the MCU timer. This would result in a one-in-twenty or 5%
error in the power measurement.
TRANSFER FUNCTION
Frequency Outputs F1 and F2
The AD7755 calculates the product of two voltage signals (on
Channel 1 and Channel 2) and then low-pass filters this product
to extract real power information. This real power information
is then converted to a frequency. The frequency information is
output on F1 and F2 in the form of active low pulses. The pulse
rate at these outputs is relatively low, e.g., 0.34 Hz maximum
for ac signals with S0 = S1 = 0—see Table III. This means that
the frequency at these outputs is generated from real power
information accumulated over a relatively long period of time.
The result is an output frequency that is proportional to the
average real power. The averaging of the real power signal is
implicit to the digital-to-frequency conversion. The output
frequency or pulse rate is related to the input voltage signals by
the following equation.
Freq
V
V
Gain
F
V
REF
=
×
×
×
2
×
8 06
.
1
2
1 4
where:
Freq
V
1
V
2
Gain
= Output frequency on F1 and F2
(Hz)
= Differential rms voltage signal on Channel 1 (volts)
= Differential rms voltage signal on Channel 2 (volts)
= 1, 2, 8 or 16, depending on the PGA gain selection
made using logic inputs G0 and G1
= The reference voltage (2.5 V
±
8%) (volts)
= One of four possible frequencies selected by using the
logic inputs S0 and S1—see Table II.
V
REF
F
1–4
Table II. F
1–4
Frequency Selection
S1
S0
F
1–4
(Hz)
1.7
3.4
6.8
13.6
XTAL/CLKIN
*
3.579 MHz/2
21
3.579 MHz/2
20
3.579 MHz/2
19
3.579 MHz/2
18
0
0
1
1
0
1
0
1
NOTE
*
F
1–4
is a binary fraction of the master clock and therefore will vary if the speci-
fied CLKIN frequency is altered.
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