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參數資料
| 型號： | AD7769JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Analog I/O Port |
| 中文描述： | 2-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數： | 11/16頁 |
| 文件大小： | 265K |
| 代理商： | AD7769JP |
AD7769
–11–
REV. A
where
A
is the peak amplitude of the sine wave and
p (V)
the
probability of occurrence at a voltage
V
. T he histogram plot of
Figure 17 corresponds very well with this shape.
Figure 17. ADC Histogram Plot
In digital signal processing applications, where the AD7769 is
used to sample ac signals, it is essential that the signal sampling
occurs at exactly equal intervals. T his minimizes errors due to
sampling uncertainty or jitter. A precise timer or clock source,
to start the conversion process, is the best method of generating
equidistant sampling intervals.
MICROPROCE SSOR/MICROCOMPUT E R INT E RFACING
T he AD7769 is designed for easy interfacing to microprocessors
and microcomputers as a memory mapped peripheral or an I/O
device. In addition, the AD7769 high speed bus timing allows
direct interfacing to many DSP processors such as the
T MS320C10 and ADSP-2101.
AD7769–T MS320C10 Interface
A typical interface to the T MS320C10 is shown in Figure 18.
T he AD7769 is mapped at a port address, and the interface is
designed for the maximum T MS320C10 clock frequency of
20 MHz.
Figure 18. AD7769 to TMS320C10 Interface
T his is for an ideal part with no differential or integral linearity
errors. T hese errors will cause a degradation in SNR. By work-
ing backwards from the above equation, it is possible to get a
measure of ADC performance expressed in effective number of
bits (N). T he effective number of bits is plotted versus fre-
quency in Figure 15. T he effective number of bits typically falls
between 7.7 and 7.9, corresponding to SNR Figures 48.1 and
49.7 dB.
Figure 15. Effective Number of Bits vs. Frequency
Figure 16 shows a spectrum analyzer plot of the output spec-
trum from one of the DACs with an ideal sine wave table loaded
to the data inputs of the DAC. In this case, the SNR is 47 dB.
Figure 16. DAC Output Spectrum
Histogram Plot
When a sine wave of specified frequency is applied to the V
IN
A
or V
IN
B input of the AD7769 and several thousand samples are
taken, it is possible to plot a histogram showing the frequency of
occurrence of each of the 256 ADC codes. If a particular step is
wider than the ideal 1 LSB width, then the code associated with
that step will accumulate more counts than for the code for an
ideal step. Likewise, a step narrower than ideal width will have
fewer counts. Missing codes are easily seen because a missing
code means zero counts for a particular code. T he absence of
large spikes in the plot indicates small differential nonlinearity.
Figure 17 shows a histogram plot for the ADC indicating very
small differential nonlinearity and no missing codes for an input
frequency of 204 kHz. For a sine wave input, a perfect ADC
would produce a probability density function described by the
equation:
p (V) =
1
π
(
A
2
±
V
2
)
1/2
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7769JP-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD7769KN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CODEC， Single |
| AD7769KP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CODEC， Single |
| AD776AQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| AD7770ACPZ | 功能描述:24 Bit Analog to Digital Converter 8 Input 8 Sigma-Delta 64-LFCSP (9x9) 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態:有效 位數:24 采樣率（每秒）:32k 輸入數:8 輸入類型:差分，單端 數據接口:SPI 配置:MUX-PGA-ADC 無線電 - S/H:ADC:- A/D 轉換器數:8 架構:三角積分 參考類型:外部， 內部 電壓 - 電源，模擬:2.2 V ~ 3.6 V 電壓 - 電源，數字:- 特性:PGA，同步采樣 工作溫度:-40°C ~ 125°C 封裝/外殼:64-WFQFN 裸露焊盤，CSP 供應商器件封裝:64-LFCSP（9x9） 標準包裝:1 |
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