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參數(shù)資料
型號: AD7777AN
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: LC2MOS, High Speed 1-, 4- & 8-Channel 10-Bit ADCs
中文描述: 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 7/12頁
文件大小: 220K
代理商: AD7777AN
AD7776/AD7777/AD7778
–7–
REV. 0
state (as programmed by CR9), and the SAR contents are trans-
ferred to the first register ADCREG1. T he SAR is then reset in
readiness for a new conversion. If simultaneous sampling has
been requested (CR6 = 1), no change occurs in the status of the
BUSY
/
INT
output and the ADC automatically starts the second
conversion. At the end of this conversion the
BUSY
/
INT
line
changes state (as programmed by CR9) and the SAR contents
are transferred to the second register, ADCREG2.
t
D
*
CLKIN
V
IN
WR
CHANNEL ACQUISITION
40ns
TYP
40ns
TYP
'HOLD'
DB9 (MSB)
*
TIMING SHOWN FOR t
D
GREATER THAN 12ns
Figure 6. ADC Conversion Start Timing
T rack-and-Hold
T he track-and-hold (T /H) amplifiers on the analog input(s) of
the AD7776/AD7777/AD7778 allow the ADC to accurately
convert an input sine wave of 2 V peak-peak amplitude up to a
frequency of 189 kHz, the Nyquist frequency of the ADC when
operated at its maximum throughput rate of 378 kHz. T his
maximum rate of conversion includes conversion time and time
between conversions. Because the input bandwidth of the track-
and-hold is much greater than 189 kHz, the input signal should
be band limited to avoid folding unwanted signals into the band
of interest.
Powerdown
T he AD7776/AD7777/AD7778 can be placed in a powerdown
mode simply by writing a logic high to location CR8 of the con-
trol register. T he following changes are effected immediately on
writing a “1” to location CR8:
Any conversion in progress is terminated.
If a conversion is in progress, the leading edge of
WR
immedi-
ately drives the
BUSY
/
INT
output high.
All the linear circuitry is turned off.
T he REFOUT output stops being driven and is weakly (5 k
)
pulled to analog ground.
Control inputs
CS
,
WR
and
RD
retain their purpose while the
AD7776/ AD7777/AD7778 is in powerdown. If no conversions
are in progress when the AD7776/AD7777/AD7778 is placed
into the powerdown modes, the contents of the ADC registers,
ADCREG1 and ADCREG2, are retained during powerdown
and can be read as normal. On returning to normal operating
mode a new conversion (or conversions, dependent on CR6) is
automatically started. On completion, the invalid conversion
results are loaded into the ADC registers losing the previous
valid results.
In order to achieve the lowest possible power consumption in
the powerdown mode special attention must be paid to the state
of the digital and analog inputs and outputs:
Because each analog input channel sees a resistive divider to
AGND, the input resistance of which does not change be-
tween normal and powerdown modes, driving the analog input
signals to 0 V or as close as possible to 0 V will minimize the
power dissipated in the input signal conditioning circuitry.
Similarly, the REFIN input sees a resistive divider to AGND,
the input resistance of which does not change between normal
and powerdown modes. If an external reference is being used,
then driving this reference input to 0 V or as close as possible
to 0 V will minimize the power dissipated in the input signal
conditioning circuitry.
Since the REFOUT pin is pulled to AGND via, typically, a
5 k
resistor, any voltage above 0 V that this output may be
pulled to by external circuitry will dissipate unnecessary
power.
Digital inputs
CS
,
WR
&
RD
should all be held at V
CC
or as
close as possible. CLK IN should be held as close as possible
to either 0 V or V
CC.
Since the
BUSY
/
INT
output is actively driven to a logic high,
any loading on this pin to 0 V will dissipate power.
T he AD7776/AD7777/AD7778 comes out of the powerdown
mode when a Logic “0” is written to location CR8 of the con-
trol register. Note that the contents of the other locations in the
control register are retained when the device is placed in
powerdown and are valid when power is restored. However,
coming out of powerdown provides an opportunity to reload
the complete contents of the control register without any extra
instructions.
相關(guān)PDF資料
PDF描述
AD7777AR LC2MOS, High Speed 1-, 4- & 8-Channel 10-Bit ADCs
AD7778 LC2MOS, High Speed 1-, 4- & 8-Channel 10-Bit ADCs
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AD7778* LC2MOS. High Speed 1-. 4- & 8-Channel 10-Bit ADCs
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