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| 型號(hào)： | AD7787BRM |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Low Power, 2-Channel 24-Bit Sigma-Delta ADC |
| 中文描述： | 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10 |
| 封裝： | MO-187BA, MSOP-10 |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 326K |
| 代理商： | AD7787BRM |
Low Power, 2-Channel
24-Bit Sigma-Delta ADC
AD7787
FEATURES
Rev.
0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Tel: 781.329.4700Fax: 781.326.8703
Power Supply: 2.5 V to 5.25 V operation
Normal mode: 75 μA max
Power-down mode: 1 μA max
RMS noise: 1.1 μV at 9.5 Hz update rate
19.5-bit p-p resolution (22 bits effective resolution)
Integral nonlinearity: 3.5 ppm typical
Simultaneous 50 Hz and 60 Hz rejection
Internal clock oscillator
Rail-to-rail input buffer
VDD monitor channel
Temperature range: 40°C to +105°C
10-lead MSOP
INTERFACE
3-wire serial
SPI, QSPI, MICROWIRE, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
Smart transmitters
Battery applications
Portable instrumentation
Sensor measurement
Temperature measurement
Pressure measurement
Weigh scales
4 to 20 mA loops
GENERAL DESCRIPTION
The AD7787 is a low power, complete analog front end for low
frequency measurement applications. It contains a low noise
24-bit Σ-Δ ADC with one differential input and one single-
ended input that can be buffered or unbuffered.
The device operates from an internal clock. Therefore, the user
does not have to supply a clock source to the device. The output
data rate from the part is software programmable and can be
varied from 9.5 Hz to 120 Hz, with the rms noise equal to
1.1 μV at the lower update rate. The internal clock frequency
can be divided by a factor of 2, 4, or 8, which leads to a
reduction in the current consumption. The update rate, cutoff
frequency, and settling time scales with the clock frequency.
The part operates with a power supply from 2.5 V to 5.25 V.
When operating from a 3 V supply, the power dissipation for
the part is 225 μW maximum. It is housed in a 10-lead MSOP.
FUNCTIONAL BLOCK DIAGRAM
0
CLOCK
Σ
-
ADC
AIN1(–)
AIN1(+)
GND
REFIN
AD7787
AIN2
V
DD
BUF
DOUT/RDY
DIN
SCLK
CS
SERIAL
INTERFACE
AND
LOGIC
CONTROL
MUX
V
DD
GND
Figure 1.
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| AD7787 | Low Power, 2-Channel 24-Bit Sigma-Delta ADC |
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| AD7787BRM-REEL | 功能描述:IC ADC 24BIT LP 2CH SIG 10-MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| AD7787BRMZ | 功能描述:IC ADC 24BIT 2CH LP SIG 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| AD7787BRMZ | 制造商:Analog Devices 功能描述:IC 24BIT ADC SMD 7787 MSOP10 |
| AD7787BRMZ-RL | 功能描述:IC ADC 24BIT 2CH LP SIG 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| AD7788 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, 16-/24-Bit Sigma-Delta ADC |
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