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參數(shù)資料
| 型號： | AD7851ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | MO-15AG, SSOP-24 |
| 文件頁數(shù)： | 28/36頁 |
| 文件大?。?/td> | 435K |
| 代理商： | AD7851ARS |
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AD7851
–28–
REV. A
SERIAL
INTERFACE
MODE
NO
YES
TRANSFER
DATA
DURING
CONVERSION
APPLY
SYNC
(IF REQUIRED), SCLK, READ
CURRENT CONVERSION RESULT ON DOUT PIN,
AND WRITE ALL 0s ON DIN PIN
WAIT FOR BUSY SIGNAL TO GO LOW
OR WAIT FOR BUSY BIT = 0
APPLY
SYNC
(IF REQUIRED), SCLK, WRITE TO CONTROL
REGISTER SETTING CONVST BIT TO 1, READ CURRENT
CONVERSION RESULT ON DOUT PIN
2, 3
INITIATE
CONVERSION
IN
SOFTWARE
WAIT APPROXIMATELY 200ns
AFTER
CONVST
RISING EDGE
APPLY
SYNC
(IF REQUIRED),
SCLK, READ PREVIOUS CONVERSION
RESULT ON DOUT PIN,
AND WRITE ALL 0s ON DIN PIN
NO
YES
TRANSFER
DATA DURING
CONVERSION
APPLY
SYNC
(IF REQUIRED), SCLK, WRITE TO CONTROL
REGISTER SETTING CONVST BIT TO 1, READ PREVIOUS
CONVERSION RESULT ON DOUT PIN (SEE NOTE)
YES
NO
NOTE:
WHEN USING THE SOFTWARE CONVERSION START AND TRANSFERRING
DATA DURING CONVERSION THE USER MUST ENSURE THE CONTROL
REGISTER WRITE OPERATION EXTENDS BEYOND THE FALLING EDGE OF
BUSY. THE FALLING EDGE OF BUSY RESETS THE CONVST BIT TO 0 AND
ONLY AFTER THIS TIME CAN IT BE REPROGRAMMED TO 1 TO START THE
NEXT CONVERSION.
START
POWER-ON, APPLY CLKIN SIGNAL,
WAIT 150ms FOR AUTOMATIC CALIBRATION
PULSE
CONVST
PIN
WAIT FOR BUSY SIGNAL TO GO
LOW OR WAIT FOR BUSY BIT = 0
Figure 41. Flowchart for Setting Up, Reading, and Writing in Interface Modes 2 and 3
Writing to the AD7851
For accessing the on-chip registers it is necessary to write to the
part. T o enable Serial Interface Mode 1, the user must also write
to the part. Figure 41 through 43 outline flowcharts of how to
configure the AD7851 for each of the different serial interface
modes. T he continuous loops on all diagrams indicate the se-
quence for more than one conversion. T he options of using a
hardware (pulsing the
CONVST
pin) or software (setting the
CONVST bit to 1) conversion start, and reading/writing during
or after conversion are shown in Figures 41 and 42. If the
CONVST
pin is never used then it should be tied to DV
DD
per-
manently. Where reference is made to the BUSY bit equal to a
logic 0, to indicate the end of conversion, the user in this case
would poll the BUSY bit in the status register.
Interface Modes 2 and 3 Configuration
Figure 41 shows the flowchart for configuring the part in Inter-
face Modes 2 and 3. For these interface modes, the read and
write operations take place simultaneously via the serial port.
Writing all 0s ensures that no valid data is written to any of the
registers. When using the software conversion start and transfer-
ring data during conversion, Note must be obeyed.
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| AD7851ARS-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 333ksps 14-bit Serial 24-Pin SSOP T/R |
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| AD7851ARZ | 功能描述:IC ADC 14BIT SRL 333KSPS 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7851ARZ3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
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