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參數資料
型號: AD7853AR
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24
封裝: SOIC-24
文件頁數: 11/34頁
文件大小: 350K
代理商: AD7853AR
REV. B
–11–
AD7853/AD7853L
STATUS REGISTER
The arrangement of the status register is shown below. The status register is a read-only register and contains 16 bits of data. The
status register is selected by first writing to the control register and putting two 1s in RDSLT1 and RDSLT0. The function of the
bits in the status register are described below. The power-up status of all bits is 0.
WRITE TO CONTROL REGISTER
SETTING RDSLT0 = RDSLT1 = 1
START
READ STATUS REGISTER
Figure 6. Flowchart for Reading the Status Register
MSB
ZERO
BUSY
ZERO
ZERO
ZERO
ZERO
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3
MODE
X
CALMD
CALSLT1
CALSLT0
STCAL
LSB
Status Register Bit Function Descriptions
Bit
Mnemonic
Comment
15
14
ZERO
BUSY
This bit is always 0.
Conversion/Calibration Busy Bit. When this bit is 1, it indicates that there is a conversion or calibration in
progress. When this bit is 0, no conversion or calibration is in progress.
These four bits are always 0.
13
12
11
10
9
8
7
6
5
ZERO
ZERO
ZERO
ZERO
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3
MODE
Power Management Bits. These bits, along with the
SLEEP
pin, will indicate whether or not the part is in a
power-down mode. See Table VI in Power-Down Section for description.
Both of these bits are always 1, indicating it is the status register that is being read. See Table II.
Interface Mode Select Bit. With this bit at 0, the device is in Interface Mode 2. With this bit at 1, the device
is in Interface Mode 1. This bit is reset to 0 after every read cycle.
Don’t care bit.
Calibration Mode Bit. A 0 in this bit indicates a self-calibration is selected; a 1 in this bit indicates a system
calibration is selected (see Table III).
Calibration Selection Bits and Start Calibration Bit. The STCAL bit is read as a 1 if a calibration is in
progress and as a 0 if no calibration is in progress. The CALSLT1 and CALSLT0 bits indicate
which of the calibration registers are addressed for reading and writing (see section on the Calibration
Registers for more details).
4
3
X
CALMD
2
1
0
CALSLT1
CALSLT0
STCAL
相關PDF資料
PDF描述
AD7853ARS 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
AD7853BN 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
AD7853BR 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
AD7853LAN 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
AD7853LAR 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
相關代理商/技術參數
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