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參數資料
| 型號： | AD7862SQ-10 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Simultaneous Sampling Dual 250 kSPS 12-Bit ADC |
| 中文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28 |
| 封裝： | CERDIP-28 |
| 文件頁數： | 11/16頁 |
| 文件大小： | 414K |
| 代理商： | AD7862SQ-10 |
AD7862
–11–
REV. 0
Figure 7 shows a histogram plot for 8192 conversions of a dc
input using the AD7862 with 5 V supply. The analog input was
set at the center of a code transition. It can be seen that all the
codes appear in the one output bin indicating very good noise
performance from the ADC.
746
756
747
748
749
750
751
752
753
754
755
9000
8000
0
4000
3000
2000
1000
6000
5000
7000
Figure 7. Histogram of 8192 Conversions of a DC Input
The same data is presented in Figure 8 as in Figure 7 except
that in this case the output data read for the device occurs
during conversion. This has the effect of injecting noise onto the
die while bit decisions are being made and this increases the
noise generated by the AD7862. The histogram plot for 8192
conversions of the same dc input now shows a larger spread of
codes. This effect will vary depending on where the serial clock
edges appear with respect to the bit trials of the conversion
process. It is possible to achieve the same level of performance
when reading during conversion as when reading after conver-
sion depending on the relationship of the serial clock edges to
the bit trial points.
The output spectrum from the ADC is evaluated by applying a
sine wave signal of very low distortion to the V
AX/BX
input that is
sampled at a 245.76 kHz sampling rate. A Fast Fourier Trans-
form (FFT) plot is generated from which the SNR data can be
obtained. Figure 9 shows a typical 2048 point FFT plot of the
AD7862 with an input signal of 10 kHz and a sampling fre-
quency of 245.76 kHz. The SNR obtained from this graph is
72.95 dB. It should be noted that the harmonics are taken into
account when calculating the SNR.
745
755
746
747
748
749
750
751
752
753
754
0
4000
3000
2000
1000
6000
5000
7000
Figure 8. Histogram of the 8192 Conversions with Read
During Conversion
–0
–120
0
12.2k
10k
30k
50k
70k
90k
–20
–40
–60
–80
–100
–10
–30
–50
–70
–90
–110
100k
F
SAMPLE
= 245760
F
SNR = –72.95dB
THD = –89.99dB
Figure 9. AD7862 FFT Plot
Effective Number of Bits
The formula given in Equation 1 relates the SNR to the number
of bits. Rewriting the formula, as in Equation 2, it is possible to
get a measure of performance expressed in effective number of
bits (N).
N
=
SNR
1.76
The effective number of bits for a device can be calculated
directly from its measured SNR.
Figure 10 shows a typical plot of effective number of bits versus
frequency for an AD7862BN with a sampling frequency of
245.76 kHz. The effective number of bits typically falls between
11.6 and 10.6 corresponding to SNR figures of 71.59dB and
65.57 dB.
6.02
(2)
0
1000
200
400
FREQUENCY – kHz
600
800
10.2
11.4
11.2
11.0
10.8
11.8
11.6
12.0
10.6
10.4
E
Figure 10. Effective Numbers of Bits vs. Frequency
Total Harmonic Distortion (THD)
Total Harmonic Distortion (THD) is the ratio of the rms sum
of harmonics to the rms value of the fundamental. For the
AD7862, THD is defined as
THD dB
)
=
20
log
V
2
2
+
V
3
2
+
V
4
V
1
2
+
V
5
2
where
V
1
is the rms amplitude of the fundamental and
V
2
,
V
3
,
V
4
and
V
5
are the rms amplitudes of the second through the
sixth harmonic. The THD is also derived from the FFT plot of
the ADC output spectrum.
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