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參數(shù)資料
| 型號： | AD7885AN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 16-Bit, High Speed Sampling ADCs |
| 中文描述： | 1-CH 16-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 319K |
| 代理商： | AD7885AN |
AD7884/AD7885
REV. C
–3–
TIMNGCHARACTERISTICS
1, 2
Limit at +25
8
C
(All Versions)
Limit at T
MIN
, T
MAX
(A, B Versions)
Parameter
Units
Conditions/Comments
t
1
t
2
t
3
t
4
t
5
t
62
t
73
50
100
0
60
0
57
5
50
40
10
25
60
60
55
55
50
100
0
60
0
57
5
50
40
80
25
60
60
70
70
ns min
ns max
ns min
ns min
ns min
ns max
ns min
ns max
ns min
ns min
ns min
ns min
ns min
ns max
ns max
CONVST
Pulse Width
CONVST
to
BUSY
Low Delay
CS
to
RD
Setup T ime
RD
Pulse Width
CS
to
RD
Hold T ime
Data Access T ime after
RD
Bus Relinquish T ime after
RD
t
8
t
9
t
10
t
11
t
12
t
13
t
14
New Data Valid before Rising Edge of
BUSY
HBEN to
RD
Setup T ime
HBEN to
RD
Hold T ime
HBEN Low Pulse Duration
HBEN High Pulse Duration
Propagation Delay from HBEN Falling to Data Valid
Propagation Delay from HBEN Rising to Data Valid
NOT ES
1
T iming specifications in
bold
print are 100% production tested. All other times are sample tested at +5
°
C to ensure compliance. All input signals are specified
with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2
t
6
is measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
3
t
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. T he measured number is then extrap-
olated back to remove the effects of charging or discharging the 100 pF capacitor. T his means that the time, t
7
, quoted in the T iming Characteristics is the true
bus relinquish time of the part and as such is independent of external bus loading capacitances.
Specifications subject to change without notice.
(V
DD
= +5 V
6
5%, V
SS
= –5 V
6
5%, AGND = DGND = GND = 0 V. See Figures 2, 3, 4 and 5.)
ORDE RING GUIDE
Linearity
T emperature
Range
E rror
(% FSR)
SNR
(dB)
Package
Option
2
Model
1
AD7884AN
AD7884BN
AD7884AP
AD7884BP
AD7885AN
AD7885BN
AD7885AAP –40
°
C to +85
°
C
AD7885ABP –40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
84
84
84
84
84
84
84
84
N-40A
N-40A
P-44A
P-44A
N-28A
N-28A
P-44A
P-44A
±
0.0075
±
0.0075
±
0.0075
±
0.0075
NOT ES
1
Analog Devices reserves the right to ship cerdip (Q) packages in lieu of plastic
DIP (N) packages.
2
N = Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC).
TO OUTPUT PIN
+2.1V
I
OH
I
OL
C
100pF
1.6mA
200
μ
A
Figure 1. Load Circuit for Access Time and Bus Relinquish
Time
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7885AQ | 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:IC 16-BIT ADC |
| AD7885BQ | 制造商:Analog Devices 功能描述: |
| AD7885JQ | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
| AD7886JD | 功能描述:IC ADC 12BIT SAMPLING HS 28-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| AD7886JP | 功能描述:IC ADC 12BIT SAMPLING HS 28-PLCC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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