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參數資料
型號: AD7888
廠商: Analog Devices, Inc.
英文描述: +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
中文描述: 2.7 V至5.25 V,微功耗,8通道,125 kSPS的,12位ADC的16引腳TSSOP
文件頁數: 6/16頁
文件大?。?/td> 164K
代理商: AD7888
REV. 0
AD7888
–6–
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The end-
points of the transfer function are zero scale, a point 1/2 LSB
below the first code transition, and full scale, a point 1/2 LSB
above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) from the ideal, i.e., AGND + 0.5 LSB.
Offset Error Match
This is the difference in offset error between any two channels.
Gain Error
This is the deviation of the last code transition (111 . . . 110) to
(111 . . . 111) from the ideal (i.e., V
REF
– 1.5 LSB) after the
offset error has been adjusted out.
Gain Error Match
This is the difference in gain error between any two channels.
Track/Hold Acquisition Time
The track/hold amplifier returns into track mode at the end of
conversion. Track/Hold acquisition time is the time required for
the output of the track/hold amplifier to reach its final value,
within
±
1/2 LSB, after the end of conversion.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental sig-
nals up to half the sampling frequency (f
S
/2), excluding dc. The
ratio is dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the quantiza-
tion noise. The theoretical signal to (noise + distortion) ratio for
an ideal N-bit converter with a sine wave input is given by:
Signal to
(
Noise + Distortion
)
=
(6.02
N +
1.76)
dB
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7888, it is defined as:
THD dB
V
V
V
V
V
V
(
) log
+
+
+
+
2
2
3
2
4
2
5
2
6
2
1
where
V
1
is the rms amplitude of the fundamental and
V
2
,
V
3
,
V
4
,
V
5
and
V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for ADCs
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
±
nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are
those for which neither m nor n is equal to zero. For example,
the second order terms include (fa + fb) and (fa – fb), while the
third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
The AD7888 is tested using the CCIF standard where two
input frequencies near the top end of the input bandwidth are
used. In this case, the second order terms are usually distanced
in frequency from the original sine waves while the third order
terms are usually at a frequency close to the input frequencies.
As a result, the second and third order terms are specified sepa-
rately. The calculation of the intermodulation distortion is as
per the THD specification where it is the ratio of the rms sum of
the individual distortion products to the rms amplitude of the
sum of the fundamentals expressed in dBs.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of crosstalk
between channels. It is measured by applying a full-scale 25kHz
sine wave signal to all nonselected input channels and determin-
ing how much that signal is attenuated in the selected channel.
The figure given is the worst case across all four or eight chan-
nels for the AD7888.
PSR (Power Supply Rejection)
Variations in power supply will affect the full-scale transition,
but not the converter’s linearity. Power supply rejection is the
maximum change in the full-scale transition point due to a
change in power-supply voltage from the nominal value.
相關PDF資料
PDF描述
AD7888AR +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
AD7888ARU +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
AD7888BR +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
AD7888BRU +2.7 V to +5.25 V, Micropower, 8-Channel, 125 kSPS, 12-Bit ADC in 16-Lead TSSOP
AD7889 12-Bit 600 kSPS ADC(單電源600kSPS12位A/D轉換器)
相關代理商/技術參數
參數描述
AD7888AR 制造商:Analog Devices 功能描述:ADC Single SAR 125ksps 12-bit Serial 16-Pin SOIC N 制造商:Analog Devices 功能描述:IC 12BIT ADC 8CH MICROPOWER 7888
AD7888AR-REEL 制造商:Analog Devices 功能描述:ADC Single SAR 125ksps 12-bit Serial 16-Pin SOIC N T/R
AD7888AR-REEL7 制造商:Analog Devices 功能描述:ADC Single SAR 125ksps 12-bit Serial 16-Pin SOIC N T/R
AD7888ARU 功能描述:IC ADC 12BIT 8CH 125KSPS 16TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率(每秒):300k 數據接口:并聯 轉換器數目:1 功率耗散(最大):75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC(0.295",7.50mm 寬) 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端,單極;1 個單端,雙極
AD7888ARU-REEL 功能描述:IC ADC 12BIT 8CH SRL 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率(每秒):45k 數據接口:串行 轉換器數目:2 功率耗散(最大):315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC(0.295",7.50mm 寬) 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端,單極
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