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參數資料
| 型號： | AD7891AS-2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 8-Channel, 12-Bit High Speed Data Acquisition System |
| 中文描述： | 8-CH 12-BIT PROPRIETARY METHOD ADC, SERIAL/PARALLEL ACCESS, PQFP44 |
| 封裝： | PLASTIC, MO-112-AA-1, MQFP-44 |
| 文件頁數： | 17/20頁 |
| 文件大小： | 173K |
| 代理商： | AD7891AS-2 |
AD7891
–17–
REV. A
AD7891 to DSP5600x
Figure 15 shows a parallel interface between the AD7891 and
the DSP5600x series of DSPs. The AD7891 should be mapped
into the top 64 locations of Y data memory. If extra wait states
are needed in this interface, they can be programmed using
the Port A Bus Control Register (please see DSP5600x users
manual for details). Data can be read from the AD7891 using
the following instruction:
MOVEO Y:ADC,X0
where
ADC
is the address in the DSP5600x address space to
which the AD7891 has been mapped.
DATA BUS
ADDRESS BUS
DB11–DB0
AD7891*
*ADDITIONAL PINS OMITTED FOR CLARITY
CS
WR
IRQ
D23–D0
EOC
RD
WR
RD
ADDR
DECODE
DS
A15–A0
X/
Y
DSP56000/
DSP56002*
Figure 15. AD7891 to DSP5600x Parallel Interface
Power Supply Bypassing and Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the specified performance. The printed circuit board on which
the AD7891 is mounted should be designed such that the ana-
log and digital sections are separated and confined to certain
areas of the board. This facilitates the use of ground planes that
can be separated easily. A minimum etch technique is generally
best for ground planes as it gives the best shielding. Digital and
analog ground planes should be joined at only one place. If the
AD7891 is the only device requiring an AGND to DGND con-
nection then the ground planes should be connected at the
AGND and DGND pins of the AD7891. If the AD7891 is in a
system where multiple devices require an AGND to DGND
connection, the connection should still be made at one point
only, a star ground point which should be established as close as
possible to the AD7891.
Digital lines running under the device should be avoided as
these will couple noise onto the die. The analog ground plane
should be allowed to run under the AD7891 to avoid noise
coupling. The power supply lines of the AD7891 should use as
large a trace as possible to provide low impedance paths and
reduce the effects of glitches on the power supply line. Fast
switching signals like clocks should be shielded with digital
ground to avoid radiating noise to other parts of the board and
should never be run near the analog inputs. Avoid crossover of
digital and analog signals. Traces on opposite sides of the board
should run at right angles to each other. This reduces the effects
of feedthrough through the board. A microstrip technique is by
far the best but not always possible with a double sided board.
In this technique, the component side of the board is dedicated
to ground plane while signal traces are placed on the solder side.
The AD7891 should have ample supply bypassing located as
close to the package as possible, ideally right up against the
device. One of the V
DD
pins (Pin 10 of the PQFP package, Pin 4
on the PLCC package) drives mainly the analog circuitry on the
chip. This pin should be decoupled to the analog ground plane
with a 10
μ
F tantalum bead capacitor in parallel with a 0.1
μ
F
capacitor. The other V
DD
pin (Pin 19 on the PQFP package,
Pin 13 on the PLCC package) drives mainly digital circuitry on
the chip. This pin should be decoupled to the digital ground
plane with a 0.1
μ
F capacitor. The 0.1
μ
F capacitors should
have low Effective Series Resistance (ESR) and Effective Series
Inductance (ESI), such as the common ceramic types or surface
mount types, which provide a low impedance path to ground at
high frequencies to handle transient currents due to internal
logic switching. Figure 16 shows the recommended decoupling
scheme.
V
(PIN 10, PQFP
PIN 4, PLCC)
DGND
AD7891
AGND
AGND
V
(PIN 19, PQFP
PIN 13, PLCC)
10
m
F
0.1
m
F
0.1
m
F
Figure 16. Recommended Decoupling Scheme for the
AD7891
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7891ASZ-1 | 功能描述:IC DAS 12BIT 8CH HI-SPD 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - ADCs/DAC - 專用型 系列:- 產品培訓模塊:Data Converter Basics 標準包裝:1 系列:- 類型:電機控制 分辨率（位）:12 b 采樣率（每秒）:1M 數據接口:串行，并聯 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應商設備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
| AD7891ASZ-1 | 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
| AD7891ASZ-1REEL | 功能描述:IC DAS 12BIT 8CH 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - ADCs/DAC - 專用型 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數據采集系統（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數據接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7891ASZ-2 | 功能描述:IC DAS 12BIT 8CH 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - ADCs/DAC - 專用型 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數據采集系統（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數據接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7891ASZ-2REEL | 功能描述:IC DAS 12BIT 8CH 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - ADCs/DAC - 專用型 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數據采集系統（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數據接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
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