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參數資料
| 型號： | AD7896JR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 2.7 V to 5.5 V, 12-Bit, 8 us ADC in 8-Pin SO/DIP |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | MS-012AA, SOIC-8 |
| 文件頁數： | 2/12頁 |
| 文件大小： | 367K |
| 代理商： | AD7896JR |
A
Versions
1
Versions
B
J
Version
S
Version
Parameter
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal to (Noise + Distortion) Ratio
3
@ +25
°
C
T
MIN
to T
MAX
Total Harmonic Distortion (THD)
3
Peak Harmonic or Spurious Noise
3
Intermodulation Distortion (IMD)
3
2nd Order Terms
3rd Order Terms
70
70
70
–80
–80
70 typ
70
dB min
dB min
dB max
dB max
f
IN
=10 kHz Sine Wave, f
SAMPLE
= 100 kHz
–80
–80
–80 typ
–80 typ
–80
f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 100 kHz
f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 100 kHz
fa = 9 kHz, fb = 9.5 kHz, f
SAMPLE
= 100 kHz
–80
–80
–80
–80
–80 typ
–80 typ
–80
–80
dB max
dB max
DC ACCURACY
Resolution
Minimum Resolution for which No
Missing Codes are Guaranteed
Relative Accuracy
3
Differential Nonlinearity
3
Positive Full-Scale Error
3
Unipolar Offset Error
12
12
12
12
Bits
12
±
1
±
1
±
3
±
4
±
4
12
±
1/2
±
1
±
1.5
±
4
±
3
12
±
1
±
1
±
3
±
5
±
5
12
±
1
±
1
±
3
±
4
±
4
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
V
DD
= 5 V
±
10%
V
DD
= 2.7 V to 3.6 V
ANALOG INPUT
Input Voltage Range
Input Current
0 to +V
DD
0 to +V
DD
0 to +V
DD
0 to +V
DD
Volts
±
2
±
2
±
2
±
5
μ
A max
LOGIC INPUTS
Input High Voltage, V
INH
2.0
2.4
0.8
±
10
10
2.0
2.4
0.8
±
10
10
2.0
2.4
0.8
±
10
10
2.0
2.4
0.8
±
10
10
V min
V
DD
= 2.7 V to 3.6 V
V
DD
= 5 V
±
10%
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN4
V max
μ
A max
pF max
V
IN
= 0 V to V
DD
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Output Coding
2.4
0.4
Straight (Natural) Binary
2.4
0.4
2.4
0.4
2.4
0.4
V min
V max
I
SOURCE
= 2 mA
I
SINK
= 2 mA
CONVERSION RATE
Conversion Time:
Mode 1 Operation
Mode 2 Operation
5
Track/Hold Acquisition Time
3
8
14
1.5
8
14
1.5
8
14
1.5
8.5
14.5
1.5
μ
s max
μ
s max
μ
s max
POWER REQUIREMENTS
V
DD
I
DD
+2.7/+5.5 +2.7/+5.5 +2.7/+5.5 +2.7/+5.5 V min/max
4
4
4
4
mA max
Digital Input @ DGND, V
DD
= 2.7 V to
3.6 V
Digital Inputs @ DGND, V
DD
= 5 V
±
10%
V
DD
= 2.7 V, Typically 9 mW
Digital Inputs @ DGND
V
DD
= 2.7 V to 3.6 V
V
DD
= 2.7 V to 3.6 V
V
DD
= 5 V
±
10%
V
DD
= 5 V
±
10%
V
DD
= 2.7 V
5
10.8
5
10.8
5
10.8
5
10.8
mA max
mW max
Power Dissipation
Power-Down Mode
I
DD
@ +25
°
C
T
MIN
to T
MAX
I
DD
@ +25
°
C
T
MIN
to T
MAX
Power Dissipation @ +25
°
C
5
15
50
150
13.5
5
15
50
150
13.5
5
μ
A typ
75
50
500
13.5
5
75
50
500
13.5
μ
A max
μ
A max
μ
A max
μ
A max
μ
W max
NOTES
1
Temperature ranges are as follows: A, B Versions: –40
°
C to +85
°
C; J Version: 0
°
C to +70
°
C; S Version: –55
°
C to +125
°
C.
2
Applies to Mode 1 operation. See section on operating modes.
3
See Terminology.
4
Sample tested @ +25
°
C to ensure compliance.
5
This 14
μ
s includes the “wake-up” time from standby. This “wake-up” time is timed from the rising edge of
CONVST
, whereas conversion is timed from the
falling edge of
CONVST
, for narrow
CONVST
pulse width the conversion time is effectively the “wake-up” time plus conversion time hence 14
μ
s. This can be
seen from Figure 3. Note that if the
CONVST
pulse width is greater than 6
μ
s then the effective conversion time will increase beyond 14
μ
s.
Specifications subject to change without notice.
REV. B
–2–
(V
DD
=
+2.7 V to +5.5 V, AGND = DGND = 0 V. All specifications T
MIN
to T
MAX
unless otherwise noted)
AD7896–SPECIFICATIONS
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