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參數(shù)資料
| 型號(hào)： | AD8303 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual, Serial Input Complete 12-Bit DAC(串行輸入雙12位D/A轉(zhuǎn)換器) |
| 中文描述： | 雙通道，串行輸入完整的12位DAC（串行輸入雙12位的D / A轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大小： | 378K |
| 代理商： | AD8303 |
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AD8303
REV. 0
–10–
DAC REGISTER A
DAC A
DAC B
AD8303
V
OUTA
V
OUTB
CS
SDI
LDA
LDB
MSB
RS
SHDN
12
MSB
RESET
LOAD
12
12-BIT SHIFT
REGISTER
CLK
12
D
Q11–Q0
en
CLK
DAC REGISTER B
MSB
RESET
LOAD
Figure 27. AD8303 Digital Section Functional Block Diagram
Separate Load pins (
LDA
and
LDB
) are provided to control the
flow of data from the shift register to the DAC registers. After
the new value is loaded in the serial-input register, it can be
asynchronously transferred to either DAC register by strobing
the appropriate Load pin (
LDA
or
LDB
). The Load pins are
level sensitive, so they should be returned high before any new
data is loaded into the serial-input register.
RESET (
RS
) AND MSB PINS
The
RS
pin forces both of the DAC registers to a known state,
based on the logic level on the MSB pin. If MSB is a logic zero,
then forcing
RS
low will set the DAC latches to all zeros and the
DAC output voltage will be zero volts. If MSB is a logic one, then
RS
will force the DAC latches to one-half scale (800
H
) and the
DAC outputs will be 1.024 V. The half-scale reset is useful for
systems where the DAC output is referenced to a “false
ground” (see the Generating Bipolar Outputs with a Single
Supply section of this data sheet for more information).
The reset function is useful for setting the DAC outputs to zero
at power-up or after a power supply interruption. Test systems
and motor controllers are two of many applications which
benefit from powering up to a known state. The reset pulse can
be generated by the microprocessor’s power-on RESET signal,
by an output from the microprocessor (Figure 33), or by an
external resistor and capacitor (Figure 34).
RS
and MSB have level-sensitive thresholds. The
RS
input
overrides other logic inputs (specifically,
LDA
and
LDB
).
However,
LDA
and
LDB
should be set high before
RS
goes
high. If
LDA
or
LDB
are kept low, then the contents of the shift
register will be transferred to the DAC register as soon as
RS
goes high.
DIGITAL INTERFACE
The AD8303 has a double-buffered serial data input. The
serial-input register is separate from the two DAC registers,
which allows preloading of a new data value into the serial
register without disturbing the present DAC values. A
functional block diagram of the digital section is shown in
Figure 27, while Table I contains the truth table for the control
logic inputs.
Three pins control the serial data input. Data at the Serial Data
Input (SDI) is clocked into the shift register on the rising edge
of CLK. Data is entered in MSB-first format. Twelve clock
pulses are required to load the 12-bit DAC value. If additional
bits are clocked into the shift register, for example when a
μ
C
sends two 8-bit bytes, the MSBs are ignored (Figure 28). The
CLK pin is only enabled when Chip Select (
CS
) is low. If only
one AD8303 is connected to a serial data bus, then
CS
can be
tied (hardwired) to ground.
BYTE 1
BYTE 2
MSB
B15 B14 B13 B12 B11 B10 B9 B8
X
X
X
X
LSB
B7
D7
MSB
B6
D6
LSB
B0
D0
B5
D5
B4
D4
B3
D3
B2
D2
B1
D1
D11 D10 D9 D8
D11–D0: 12-BIT DAC VALUE
X = DON'T CARE
THE MSB OF BYTE 1 IS THE FIRST BIT THAT IS LOADED INTO THE DAC
Figure 28. Typical AD8303-Microprocessor Serial Data
Input Format
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8303AN | 制造商:AD 制造商全稱:Analog Devices 功能描述:+3 V, Dual, Serial Input Complete 12-Bit DAC |
| AD8303AR | 制造商:Analog Devices 功能描述:IC 12-BIT DAC |
| AD8303AR-REEL | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 12-bit 14-Pin SOIC N T/R 制造商:Rochester Electronics LLC 功能描述:IC,DUAL 12BIT,+3V,COMPLETE DAC,TAPE&REEL - Tape and Reel |
| AD8303ARZ-REEL | 功能描述:IC DAC 12BIT SERIAL 14SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| AD8303JRU | 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 12-bit 14-Pin TSSOP 制造商:Rochester Electronics LLC 功能描述:IC,DUAL 12BIT,+3V,COMPLETE DAC - Bulk |
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