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參數(shù)資料
| 型號： | AD8304ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | 160 dB Range (100 pA -10 mA) Logarithmic Converter |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 10 MHz BAND WIDTH, PDSO14 |
| 封裝： | MO-153AB-1, TSSOP-14 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大小： | 4286K |
| 代理商： | AD8304ARU |
REV. A
–18–
AD8304
1
VNEG
ACOM
14
2
PWDN
BFNG
13
3
VSUM
VPS1
12
4
INPT
VOUT
11
5
VSUM
VPS2
10
6
VPDB
BFIN
9
7
VREF
VLOG
8
C2
1nF
C1
0.1nF
R10
10k
+V
S
–V
S
GND
SW1
R5
OPEN
R7
OPEN
LK1
INSTALLED
INPUT
BIASER
LK2 OPEN
C10
0.1 F
1nF
R15
C11
R7
OPEN
R9
0.1 F
R6
OPEN
C9
10nF
R4
OPEN
R3
OPEN
R1
OPEN
R2
0
C3
1nF
C4
0.1 F
R11
0
R14
0
C6
OPEN
C5
OPEN
C7
OPEN
R12
OPEN
C8
OPEN
R13
0
BUFFER
OUT
LOG
OUT
AD8304
Figure 22. Evaluation Board Schematic
AD8138
EVALUATION
BOARD
OUTPUT INPUT INPUTA
HP 3577A
NETWORK
ANALYZER
INPUTB
+IN
B
A
VNEG
PWDN
VSUM
INPT
VSUM
VPDB
VREF
ACOM
BFNG
VPS1
VOUT
VPS2
BFIN
VLOG
1
2
3
4
5
6
7
14
13
12
11
10
9
8
POWER
SPLITTER
0.1 F
R1
750
1nF
+V
S
AD8304
Figure 20. Configuration for Logarithmic
Amplifier Bandwidth Measurement
The setup shown in Figure 20 was used for frequency response
measurements of the logarithmic amplifier section. In this con-
figuration, the AD8138 output was offset to 1.5 V and R1 was
adjusted to provide the appropriate operating current. The
buffer amplifier was then used; still any capacitance added at
the VLOG Pin during measurement would form a filter with the
on-chip 5 k
resistor.
The configuration illustrated in Figure 21 measures the device
noise. Batteries provide both the supply and the input signal to
remove the supplies as a possible noise source and to reduce
ground loop effects. The AD8304 Evaluation Board and the
current setting resistors are mounted in closed aluminum enclo-
sures to provide additional shielding to external noise sources.
SOURCE
TRIGGER
CHANNEL
1
HP 89410A
CHANNEL
2
VNEG
PWDN
VSUM
INPT
VSUM
VPDB
VREF
ACOM
BFNG
VPS1
VOUT
VPS2
BFIN
VLOG
1
2
3
4
5
6
7
14
13
12
11
10
9
8
R1
750
1nF
ALKALINE
D CELL
ALKALINE
D CELL
AD8304
Figure 21. Configuration for Noise Spectral
Density Measurement
Evaluation Board
An evaluation board is available for the AD8304, the schematic
for which is shown in Figure 22, and the two board sides are
shown in Figure 23 and Figure 24. It can be configured for a wide
variety of experiments. The board is factory set for Photocon-
ductive Mode with a buffer gain of unity, providing a slope of
10 mV/dB and an intercept of 100 pA. By substituting resistor and
capacitor values, all of the application circuits presented in this
data sheet can be evaluated. Table V describes the various configu-
ration options.
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| AD8304ARU-REEL | 制造商:Analog Devices 功能描述:SP Amp LOG Amp Single R-R O/P 5.5V 14-Pin TSSOP T/R 制造商:Analog Devices 功能描述:SP AMP LOG AMP SGL R-R O/P 5.5V 14TSSOP - Tape and Reel |
| AD8304ARU-REEL7 | 功能描述:IC LOGARITHMIC CONV 14-TSSOP T/R RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| AD8304ARUZ | 功能描述:IC LOGARITHM CONV 160DB 14-TSSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| AD8304ARUZ | 制造商:Analog Devices 功能描述:Logarithmic Amplifier IC |
| AD8304ARUZ-RL7 | 功能描述:IC LOGARITHM CONV 160DB 14-TSSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
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