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參數資料
型號: AD8306AR
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: 5 MHz-400 MHz 100 dB High Precision Limiting-Logarithmic Amplifier
中文描述: LOG OR ANTILOG AMPLIFIER, 395 MHz BAND WIDTH, PDSO16
封裝: SO-16
文件頁數: 14/16頁
文件大小: 397K
代理商: AD8306AR
REV. A
AD8306
–14–
Table III. Evaluation Board Setup Options
Component
Function
Default Condition
SW1
Device Enable
. When in Position A, the ENBL pin is connected to +V
S
and the
AD8306 is in normal operating mode. In Position B, the ENBL pin is connected
to an SMA connector labeled Ext Enable. A signal can be applied to this connector
to enable/disable the AD8306.
SW1 = A
R1
This pad is used to ac-couple INLO to ground for single-ended input drive. To drive
the AD8306 differentially, R1 should be removed.
R1 = 0
R/L, C1, C2
Input Interface.
The 52.3
resistor in position R10, along with C1 and C2, create
a high-pass input filter whose corner frequency (640 kHz) is equal to 1/(2
π
RC
),
where
C
= (C1)/2 and
R
is the parallel combination of 52.3
and the AD8306’s
input impedance of 1000
. Alternatively, the 52.3
resistor can be replaced by
an inductor to form an input matching network. See Input Matching Network
section for more details.
R10 = 52.3
C1 = C2 = 0.01
μ
F
R3/R4
Slope Adjust.
A simple slope adjustment can be implemented by adding a resistive
divider at the VLOG output. R3 and R4, whose sum should be about 1 k
, and
never less than 40
(see specs), set the slope according to the equation:
Slope
= 20
mV
/
dB
×
R
4/(
R
3 +
R
4).
R3 = 0
R4 =
`
L1, C5, C6
Limiter Output Coupling.
C5 and C6 ac-couple the limiter’s differential outputs.
By adjusting these values and installing an inductor in L1, an output matching
network can be implemented. To convert the limiter’s differential output to single-
ended, R11 and R12 (nominally 0
) can be replaced with a surface mount balun
such as the ETC1-1-13 (Macom). The balun can be grounded by soldering a 0
into Position R9 (nominally open).
L1 = Open
C5 = 0.01
μ
F
C6 = 0.01
μ
F
R9 = Open
R10 = R11 = 0
R8, LK1
Limiter Output Current.
With LK1 installed, R8 enables and sets the limiter
output current. The limiter’s output current is set according to the equation
(
I
OUT
= 400
mV
/
R
8). The limiter current can be as high as 10 mA (R8 = 40
).
To disable the limiter (recommended if the limiter is not being used), LK1 should
be removed.
LK1 Installed. R8 = 402
R6, R7 (Limited Load
Resistors) = 50
C7
RSSI Bandwidth Adjust
. The addition of C7 (farads) will lower the RSSI bandwidth of
the VLOG output according to the equation:
f
CORNER
(Hz)
= 12.7
×
10
–6
/(
C
7 + 3.5
×
10
–12
).
C7 = Open
1
2
3
4
5
6
7
8
VLOG
VPS2
PADL
LMHI
LMLO
PADL
FLTR
LMDR
COM2
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
AD8306
9
10
11
14
15
16
12
13
C3
0.1
m
F
R10
52.3
V
C1
0.01
m
F
C2
0.01
m
F
R2
10
V
R1
0
V
+V
S
EXT
ENABLE
C7 (OPEN)
R6
50
V
C4
0.1
m
F
R7
50
V
R3
0
V
R5
10
V
R4
(OPEN)
V
RSSI
+V
S
L1
(OPEN)
C5
0.01
m
F
C6
0.01
m
F
LK1
R8
402
V
SIG
INHI
SIG
INLO
A
B
SW1
R12
0
V
R11
0
V
R9
(OPEN)
Figure 33. Evaluation Board Schematic
相關PDF資料
PDF描述
AD8306AR-REEL 5 MHz-400 MHz 100 dB High Precision Limiting-Logarithmic Amplifier
AD8306AR-REEL7 5 MHz-400 MHz 100 dB High Precision Limiting-Logarithmic Amplifier
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AD8307AR Low Cost DC-500 MHz, 92 dB Logarithmic Amplifier
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相關代理商/技術參數
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