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參數資料
| 型號： | AD8367-EVAL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | RECTIFIER STANDARD SINGLE 1A 50V 50 30A-ifsm 5uA-ir 1V-vf DO-41 5K/REEL-13 |
| 中文描述： | 500兆赫，線性以dB顯卡帶AGC檢測 |
| 文件頁數： | 11/16頁 |
| 文件大?。?/td> | 607K |
| 代理商： | AD8367-EVAL |
REV. 0
AD8367
–11–
Table II. Reactive Matching Components for a 50
System, R
S
= 50
, R
LOAD
= 50
Frequency (MHz) XS
IN
10
70
140
190
240
XP
IN
(pF)
120
15
7
4
3
XS
OUT
(pF)
180
27
13
10
7
XP
OUT
1.8
270 nH
150 nH
100 nH
82 nH
1.5
220 nH
120 nH
82 nH
68 nH
H
H
Table I. S-Parameters for 50
System for V
S
= 5 V, and V
GAIN
= 0.75 V
Frequency (MHz)
S11
0.64 0
°
0.64
–
1.5
°
0.63
–
3.0
°
0.63
–
3.7
°
0.62
–
4.9
°
S21
8.5 177
°
9.0 168
°
10.0 152
°
10.4 138
°
10.8 125
°
S12
2
× 10
3
5
× 10
4
9
× 10
4
9
× 10
4
1
× 10
3
S22
0.02 11
°
0.02 54
°
0.06 88
°
0.09 83
°
0.1 76
°
10
70
140
190
240
153
°
106
°
80
°
147
°
148
°
1
0.3333
–
0.3333
–
1
–
3
3
0.3333
1
3
Z
IN
R
SOURCE
SERIES L
SHUNT C
f
C
140MHz, Z
193.4 j46.3 , Z
LOAD
229 j8.8
R
SOURCE
50 , R
LOAD
50
R
SOURCE
V
S
XP
IN
5pF
XS
120nH
Z
IN
Z
OUT
C
0.1 F
XS
13pF
XP
150nH
R
LOAD
50
AD8367
Z
IN
Z
LOAD
Figure 6. Reactive Matching Example for f 140 MHz
APPLICATIONS
The AD8367 can be configured either as a variable-gain amplifier
whose gain is controlled externally through the GAIN pin or as an
AGC amplifier, using a supply voltage of 2.7 V to 5.5 V. The
supply to the VPSO and VPSI pins should be decoupled using a
low-inductance 0.1 F surface-mount ceramic capacitor, as close
to the device as possible. Additional supply decoupling may be
provided by a small series resistor. A 10 nF capacitor from pin
DECL to OCOM is recommended to decouple the output refer-
ence voltage.
Input and Output Matching
The AD8367 is designed to operate in a 200
impedance sys-
tem. The output amplifier is a low output impedance voltage
buffer with a 50
damping resistor to desensitize it from load
reactance and parasitics. The quoted performance includes the
voltage division between the 50
resistor and the 200
load.
The AD8367 can be reactively matched to an impedance other
than 200
using traditional step-up and step down matching
networks or high quality transformers. Table I lists the 50
S-parameters for the AD8367 at a V
GAIN
750 mV.
Figure 6 illustrates an example where the AD8367 is matched to
50
at 140 MHz. As shown in the Smith Chart, the input match-
ing network shifts the input impedance from Z
IN
to 50
with an
insertion loss of less than 2 dB over a 5 MHz bandwidth. For the
output network, the 50
load is made to present 200
to the
AD8367 output. Table II provides the component values required
for 50
matching at several frequencies of interest.
In situations where added loss and noise can be tolerated, a
resistive pad can be used to provide broad-band near-matched
impedances at the device terminals and the terminations.
Minimum-loss L-pad networks are used on the evaluation board
(see Figure 19) to allow easy interfacing to standard 50
test
equipment. Each pad introduces an 11.5 dB power loss
(5.5 dB voltage loss).
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